diff options
Diffstat (limited to 'Documentation/devicetree')
414 files changed, 7546 insertions, 3220 deletions
diff --git a/Documentation/devicetree/bindings/.yamllint b/Documentation/devicetree/bindings/.yamllint index 532799501800..8f9dd18dfe04 100644 --- a/Documentation/devicetree/bindings/.yamllint +++ b/Documentation/devicetree/bindings/.yamllint @@ -30,7 +30,7 @@ rules: document-start: present: true empty-lines: - max: 3 + max: 1 max-end: 1 empty-values: forbid-in-block-mappings: true diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 8390d6c00030..8d6f85f4455d 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -32,7 +32,8 @@ find_cmd = $(find_all_cmd) | \ sed 's|^$(srctree)/||' | \ grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))" | \ sed 's|^|$(srctree)/|' -CHK_DT_EXAMPLES := $(patsubst $(srctree)/%.yaml,%.example.dtb, $(shell $(find_cmd))) +CHK_DT_EXAMPLES := $(patsubst $(srctree)/%.yaml,%.example.dtb, \ + $(shell $(find_cmd) | xargs grep -l '^examples:')) quiet_cmd_yamllint = LINT $(src) cmd_yamllint = ($(find_cmd) | \ diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml index a758f4bb2bb3..4683bd1293fa 100644 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml @@ -27,17 +27,17 @@ properties: additionalProperties: false properties: - "#address-cells": + '#address-cells': const: 1 - "#size-cells": + '#size-cells': const: 0 patternProperties: - "^osc[0-9]$": + '^osc[0-9]$': type: object - "^[a-z0-9,_]+(clk|pll|clk_gate|clk_divided)(@[a-f0-9]+)?$": + '^[a-z0-9,_]+(clk|pll|clk_gate|clk_divided)(@[a-f0-9]+)?$': type: object $ref: '#/$defs/clock-props' unevaluatedProperties: false @@ -58,14 +58,14 @@ properties: minItems: 1 maxItems: 5 - "#address-cells": + '#address-cells': const: 1 - "#size-cells": + '#size-cells': const: 0 patternProperties: - "^[a-z0-9,_]+(clk|pll)(@[a-f0-9]+)?$": + '^[a-z0-9,_]+(clk|pll)(@[a-f0-9]+)?$': type: object $ref: '#/$defs/clock-props' unevaluatedProperties: false @@ -86,11 +86,11 @@ properties: required: - compatible - clocks - - "#clock-cells" + - '#clock-cells' required: - compatible - - "#clock-cells" + - '#clock-cells' required: - compatible @@ -104,7 +104,7 @@ $defs: reg: maxItems: 1 - "#clock-cells": + '#clock-cells': const: 0 clk-gate: diff --git a/Documentation/devicetree/bindings/arm/amd,seattle.yaml b/Documentation/devicetree/bindings/arm/amd,seattle.yaml new file mode 100644 index 000000000000..7a3fc05b19eb --- /dev/null +++ b/Documentation/devicetree/bindings/arm/amd,seattle.yaml @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/amd,seattle.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD Seattle SoC Platforms + +maintainers: + - Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> + - Tom Lendacky <thomas.lendacky@amd.com> + +properties: + $nodename: + const: "/" + compatible: + oneOf: + - description: Boards with AMD Seattle SoC + items: + - const: amd,seattle-overdrive + - const: amd,seattle + +additionalProperties: true +... diff --git a/Documentation/devicetree/bindings/arm/apm.yaml b/Documentation/devicetree/bindings/arm/apm.yaml new file mode 100644 index 000000000000..ea0d362cea3a --- /dev/null +++ b/Documentation/devicetree/bindings/arm/apm.yaml @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/apm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SoC Platforms + +maintainers: + - Khuong Dinh <khuong@os.amperecomputing.com> + +properties: + $nodename: + const: "/" + compatible: + oneOf: + - description: Boards with X-Gene1 Soc + items: + - const: apm,mustang + - const: apm,xgene-storm + + - description: Boards with X-Gene2 SoC + items: + - const: apm,merlin + - const: apm,xgene-shadowcat + +additionalProperties: true +... diff --git a/Documentation/devicetree/bindings/arm/lge.yaml b/Documentation/devicetree/bindings/arm/lge.yaml new file mode 100644 index 000000000000..d983ef7fcbd6 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/lge.yaml @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/lge.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LG Electronics SoC Platforms + +maintainers: + - Chanho Min <chanho.min@lge.com> + +properties: + $nodename: + const: "/" + compatible: + oneOf: + - description: Boards with LG1312 Soc + items: + - const: lge,lg1312-ref + - const: lge,lg1312 + + - description: Boards with LG1313 SoC + items: + - const: lge,lg1313-ref + - const: lge,lg1313 + +additionalProperties: true +... diff --git a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt deleted file mode 100644 index 72de11bd2ef0..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt +++ /dev/null @@ -1,146 +0,0 @@ -Marvell Armada AP80x System Controller -====================================== - -The AP806/AP807 is one of the two core HW blocks of the Marvell Armada -7K/8K/931x SoCs. It contains system controllers, which provide several -registers giving access to numerous features: clocks, pin-muxing and -many other SoC configuration items. This DT binding allows to describe -these system controllers. - -For the top level node: - - compatible: must be: "syscon", "simple-mfd"; - - reg: register area of the AP80x system controller - -SYSTEM CONTROLLER 0 -=================== - -Clocks: -------- - - -The Device Tree node representing the AP806/AP807 system controller -provides a number of clocks: - - - 0: reference clock of CPU cluster 0 - - 1: reference clock of CPU cluster 1 - - 2: fixed PLL at 1200 Mhz - - 3: MSS clock, derived from the fixed PLL - -Required properties: - - - compatible: must be one of: - * "marvell,ap806-clock" - * "marvell,ap807-clock" - - #clock-cells: must be set to 1 - -Pinctrl: --------- - -For common binding part and usage, refer to -Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt. - -Required properties: -- compatible must be "marvell,ap806-pinctrl", - -Available mpp pins/groups and functions: -Note: brackets (x) are not part of the mpp name for marvell,function and given -only for more detailed description in this document. - -name pins functions -================================================================================ -mpp0 0 gpio, sdio(clk), spi0(clk) -mpp1 1 gpio, sdio(cmd), spi0(miso) -mpp2 2 gpio, sdio(d0), spi0(mosi) -mpp3 3 gpio, sdio(d1), spi0(cs0n) -mpp4 4 gpio, sdio(d2), i2c0(sda) -mpp5 5 gpio, sdio(d3), i2c0(sdk) -mpp6 6 gpio, sdio(ds) -mpp7 7 gpio, sdio(d4), uart1(rxd) -mpp8 8 gpio, sdio(d5), uart1(txd) -mpp9 9 gpio, sdio(d6), spi0(cs1n) -mpp10 10 gpio, sdio(d7) -mpp11 11 gpio, uart0(txd) -mpp12 12 gpio, sdio(pw_off), sdio(hw_rst) -mpp13 13 gpio -mpp14 14 gpio -mpp15 15 gpio -mpp16 16 gpio -mpp17 17 gpio -mpp18 18 gpio -mpp19 19 gpio, uart0(rxd), sdio(pw_off) - -GPIO: ------ -For common binding part and usage, refer to -Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml. - -Required properties: - -- compatible: "marvell,armada-8k-gpio" - -- offset: offset address inside the syscon block - -Optional properties: - -- marvell,pwm-offset: offset address of PWM duration control registers inside - the syscon block - -Example: -ap_syscon: system-controller@6f4000 { - compatible = "syscon", "simple-mfd"; - reg = <0x6f4000 0x1000>; - - ap_clk: clock { - compatible = "marvell,ap806-clock"; - #clock-cells = <1>; - }; - - ap_pinctrl: pinctrl { - compatible = "marvell,ap806-pinctrl"; - }; - - ap_gpio: gpio { - compatible = "marvell,armada-8k-gpio"; - offset = <0x1040>; - ngpios = <19>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&ap_pinctrl 0 0 19>; - marvell,pwm-offset = <0x10c0>; - #pwm-cells = <2>; - clocks = <&ap_clk 3>; - }; -}; - -SYSTEM CONTROLLER 1 -=================== - -Cluster clocks: ---------------- - -Device Tree Clock bindings for cluster clock of Marvell -AP806/AP807. Each cluster contain up to 2 CPUs running at the same -frequency. - -Required properties: - - compatible: must be one of: - * "marvell,ap806-cpu-clock" - * "marvell,ap807-cpu-clock" -- #clock-cells : should be set to 1. - -- clocks : shall be the input parent clock(s) phandle for the clock - (one per cluster) - -- reg: register range associated with the cluster clocks - -ap_syscon1: system-controller@6f8000 { - compatible = "marvell,armada-ap806-syscon1", "syscon", "simple-mfd"; - reg = <0x6f8000 0x1000>; - - cpu_clk: clock-cpu@278 { - compatible = "marvell,ap806-cpu-clock"; - clocks = <&ap_clk 0>, <&ap_clk 1>; - #clock-cells = <1>; - reg = <0x278 0xa30>; - }; -}; diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt deleted file mode 100644 index 54ff9f218328..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt +++ /dev/null @@ -1,191 +0,0 @@ -Marvell Armada CP110 System Controller -====================================== - -The CP110 is one of the two core HW blocks of the Marvell Armada 7K/8K -SoCs. It contains system controllers, which provide several registers -giving access to numerous features: clocks, pin-muxing and many other -SoC configuration items. This DT binding allows to describe these -system controllers. - -For the top level node: - - compatible: must be: "syscon", "simple-mfd"; - - reg: register area of the CP110 system controller - -SYSTEM CONTROLLER 0 -=================== - -Clocks: -------- - -The Device Tree node representing this System Controller 0 provides a -number of clocks: - - - a set of core clocks - - a set of gateable clocks - -Those clocks can be referenced by other Device Tree nodes using two -cells: - - The first cell must be 0 or 1. 0 for the core clocks and 1 for the - gateable clocks. - - The second cell identifies the particular core clock or gateable - clocks. - -The following clocks are available: - - Core clocks - - 0 0 APLL - - 0 1 PPv2 core - - 0 2 EIP - - 0 3 Core - - 0 4 NAND core - - 0 5 SDIO core - - Gateable clocks - - 1 0 Audio - - 1 1 Comm Unit - - 1 2 NAND - - 1 3 PPv2 - - 1 4 SDIO - - 1 5 MG Domain - - 1 6 MG Core - - 1 7 XOR1 - - 1 8 XOR0 - - 1 9 GOP DP - - 1 11 PCIe x1 0 - - 1 12 PCIe x1 1 - - 1 13 PCIe x4 - - 1 14 PCIe / XOR - - 1 15 SATA - - 1 16 SATA USB - - 1 17 Main - - 1 18 SD/MMC/GOP - - 1 21 Slow IO (SPI, NOR, BootROM, I2C, UART) - - 1 22 USB3H0 - - 1 23 USB3H1 - - 1 24 USB3 Device - - 1 25 EIP150 - - 1 26 EIP197 - -Required properties: - - - compatible: must be: - "marvell,cp110-clock" - - #clock-cells: must be set to 2 - -Pinctrl: --------- - -For common binding part and usage, refer to the file -Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt. - -Required properties: - -- compatible: "marvell,armada-7k-pinctrl", "marvell,armada-8k-cpm-pinctrl", - "marvell,armada-8k-cps-pinctrl" or "marvell,cp115-standalone-pinctrl" - depending on the specific variant of the SoC being used. - -Available mpp pins/groups and functions: -Note: brackets (x) are not part of the mpp name for marvell,function and given -only for more detailed description in this document. - -name pins functions -================================================================================ -mpp0 0 gpio, dev(ale1), au(i2smclk), ge0(rxd3), tdm(pclk), ptp(pulse), mss_i2c(sda), uart0(rxd), sata0(present_act), ge(mdio) -mpp1 1 gpio, dev(ale0), au(i2sdo_spdifo), ge0(rxd2), tdm(drx), ptp(clk), mss_i2c(sck), uart0(txd), sata1(present_act), ge(mdc) -mpp2 2 gpio, dev(ad15), au(i2sextclk), ge0(rxd1), tdm(dtx), mss_uart(rxd), ptp(pclk_out), i2c1(sck), uart1(rxd), sata0(present_act), xg(mdc) -mpp3 3 gpio, dev(ad14), au(i2slrclk), ge0(rxd0), tdm(fsync), mss_uart(txd), pcie(rstoutn), i2c1(sda), uart1(txd), sata1(present_act), xg(mdio) -mpp4 4 gpio, dev(ad13), au(i2sbclk), ge0(rxctl), tdm(rstn), mss_uart(rxd), uart1(cts), pcie0(clkreq), uart3(rxd), ge(mdc) -mpp5 5 gpio, dev(ad12), au(i2sdi), ge0(rxclk), tdm(intn), mss_uart(txd), uart1(rts), pcie1(clkreq), uart3(txd), ge(mdio) -mpp6 6 gpio, dev(ad11), ge0(txd3), spi0(csn2), au(i2sextclk), sata1(present_act), pcie2(clkreq), uart0(rxd), ptp(pulse) -mpp7 7 gpio, dev(ad10), ge0(txd2), spi0(csn1), spi1(csn1), sata0(present_act), led(data), uart0(txd), ptp(clk) -mpp8 8 gpio, dev(ad9), ge0(txd1), spi0(csn0), spi1(csn0), uart0(cts), led(stb), uart2(rxd), ptp(pclk_out), synce1(clk) -mpp9 9 gpio, dev(ad8), ge0(txd0), spi0(mosi), spi1(mosi), pcie(rstoutn), synce2(clk) -mpp10 10 gpio, dev(readyn), ge0(txctl), spi0(miso), spi1(miso), uart0(cts), sata1(present_act) -mpp11 11 gpio, dev(wen1), ge0(txclkout), spi0(clk), spi1(clk), uart0(rts), led(clk), uart2(txd), sata0(present_act) -mpp12 12 gpio, dev(clk_out), nf(rbn1), spi1(csn1), ge0(rxclk) -mpp13 13 gpio, dev(burstn), nf(rbn0), spi1(miso), ge0(rxctl), mss_spi(miso) -mpp14 14 gpio, dev(bootcsn), dev(csn0), spi1(csn0), spi0(csn3), au(i2sextclk), spi0(miso), sata0(present_act), mss_spi(csn) -mpp15 15 gpio, dev(ad7), spi1(mosi), spi0(mosi), mss_spi(mosi), ptp(pulse_cp2cp) -mpp16 16 gpio, dev(ad6), spi1(clk), mss_spi(clk) -mpp17 17 gpio, dev(ad5), ge0(txd3) -mpp18 18 gpio, dev(ad4), ge0(txd2), ptp(clk_cp2cp) -mpp19 19 gpio, dev(ad3), ge0(txd1), wakeup(out_cp2cp) -mpp20 20 gpio, dev(ad2), ge0(txd0) -mpp21 21 gpio, dev(ad1), ge0(txctl), sei(in_cp2cp) -mpp22 22 gpio, dev(ad0), ge0(txclkout), wakeup(in_cp2cp) -mpp23 23 gpio, dev(a1), au(i2smclk), link(rd_in_cp2cp) -mpp24 24 gpio, dev(a0), au(i2slrclk) -mpp25 25 gpio, dev(oen), au(i2sdo_spdifo) -mpp26 26 gpio, dev(wen0), au(i2sbclk) -mpp27 27 gpio, dev(csn0), spi1(miso), mss_gpio4, ge0(rxd3), spi0(csn4), ge(mdio), sata0(present_act), uart0(rts), rei(in_cp2cp) -mpp28 28 gpio, dev(csn1), spi1(csn0), mss_gpio5, ge0(rxd2), spi0(csn5), pcie2(clkreq), ptp(pulse), ge(mdc), sata1(present_act), uart0(cts), led(data) -mpp29 29 gpio, dev(csn2), spi1(mosi), mss_gpio6, ge0(rxd1), spi0(csn6), pcie1(clkreq), ptp(clk), mss_i2c(sda), sata0(present_act), uart0(rxd), led(stb) -mpp30 30 gpio, dev(csn3), spi1(clk), mss_gpio7, ge0(rxd0), spi0(csn7), pcie0(clkreq), ptp(pclk_out), mss_i2c(sck), sata1(present_act), uart0(txd), led(clk) -mpp31 31 gpio, dev(a2), mss_gpio4, pcie(rstoutn), ge(mdc) -mpp32 32 gpio, mii(col), mii(txerr), mss_spi(miso), tdm(drx), au(i2sextclk), au(i2sdi), ge(mdio), sdio(v18_en), pcie1(clkreq), mss_gpio0 -mpp33 33 gpio, mii(txclk), sdio(pwr10), mss_spi(csn), tdm(fsync), au(i2smclk), sdio(bus_pwr), xg(mdio), pcie2(clkreq), mss_gpio1 -mpp34 34 gpio, mii(rxerr), sdio(pwr11), mss_spi(mosi), tdm(dtx), au(i2slrclk), sdio(wr_protect), ge(mdc), pcie0(clkreq), mss_gpio2 -mpp35 35 gpio, sata1(present_act), i2c1(sda), mss_spi(clk), tdm(pclk), au(i2sdo_spdifo), sdio(card_detect), xg(mdio), ge(mdio), pcie(rstoutn), mss_gpio3 -mpp36 36 gpio, synce2(clk), i2c1(sck), ptp(clk), synce1(clk), au(i2sbclk), sata0(present_act), xg(mdc), ge(mdc), pcie2(clkreq), mss_gpio5 -mpp37 37 gpio, uart2(rxd), i2c0(sck), ptp(pclk_out), tdm(intn), mss_i2c(sck), sata1(present_act), ge(mdc), xg(mdc), pcie1(clkreq), mss_gpio6, link(rd_out_cp2cp) -mpp38 38 gpio, uart2(txd), i2c0(sda), ptp(pulse), tdm(rstn), mss_i2c(sda), sata0(present_act), ge(mdio), xg(mdio), au(i2sextclk), mss_gpio7, ptp(pulse_cp2cp) -mpp39 39 gpio, sdio(wr_protect), au(i2sbclk), ptp(clk), spi0(csn1), sata1(present_act), mss_gpio0 -mpp40 40 gpio, sdio(pwr11), synce1(clk), mss_i2c(sda), au(i2sdo_spdifo), ptp(pclk_out), spi0(clk), uart1(txd), ge(mdio), sata0(present_act), mss_gpio1 -mpp41 41 gpio, sdio(pwr10), sdio(bus_pwr), mss_i2c(sck), au(i2slrclk), ptp(pulse), spi0(mosi), uart1(rxd), ge(mdc), sata1(present_act), mss_gpio2, rei(out_cp2cp) -mpp42 42 gpio, sdio(v18_en), sdio(wr_protect), synce2(clk), au(i2smclk), mss_uart(txd), spi0(miso), uart1(cts), xg(mdc), sata0(present_act), mss_gpio4 -mpp43 43 gpio, sdio(card_detect), synce1(clk), au(i2sextclk), mss_uart(rxd), spi0(csn0), uart1(rts), xg(mdio), sata1(present_act), mss_gpio5, wakeup(out_cp2cp) -mpp44 44 gpio, ge1(txd2), uart0(rts), ptp(clk_cp2cp) -mpp45 45 gpio, ge1(txd3), uart0(txd), pcie(rstoutn) -mpp46 46 gpio, ge1(txd1), uart1(rts) -mpp47 47 gpio, ge1(txd0), spi1(clk), uart1(txd), ge(mdc) -mpp48 48 gpio, ge1(txctl_txen), spi1(mosi), xg(mdc), wakeup(in_cp2cp) -mpp49 49 gpio, ge1(txclkout), mii(crs), spi1(miso), uart1(rxd), ge(mdio), pcie0(clkreq), sdio(v18_en), sei(out_cp2cp) -mpp50 50 gpio, ge1(rxclk), mss_i2c(sda), spi1(csn0), uart2(txd), uart0(rxd), xg(mdio), sdio(pwr11) -mpp51 51 gpio, ge1(rxd0), mss_i2c(sck), spi1(csn1), uart2(rxd), uart0(cts), sdio(pwr10) -mpp52 52 gpio, ge1(rxd1), synce1(clk), synce2(clk), spi1(csn2), uart1(cts), led(clk), pcie(rstoutn), pcie0(clkreq) -mpp53 53 gpio, ge1(rxd2), ptp(clk), spi1(csn3), uart1(rxd), led(stb), sdio(led) -mpp54 54 gpio, ge1(rxd3), synce2(clk), ptp(pclk_out), synce1(clk), led(data), sdio(hw_rst), sdio_wp(wr_protect) -mpp55 55 gpio, ge1(rxctl_rxdv), ptp(pulse), sdio(led), sdio_cd(card_detect) -mpp56 56 gpio, tdm(drx), au(i2sdo_spdifo), spi0(clk), uart1(rxd), sata1(present_act), sdio(clk) -mpp57 57 gpio, mss_i2c(sda), ptp(pclk_out), tdm(intn), au(i2sbclk), spi0(mosi), uart1(txd), sata0(present_act), sdio(cmd) -mpp58 58 gpio, mss_i2c(sck), ptp(clk), tdm(rstn), au(i2sdi), spi0(miso), uart1(cts), led(clk), sdio(d0) -mpp59 59 gpio, mss_gpio7, synce2(clk), tdm(fsync), au(i2slrclk), spi0(csn0), uart0(cts), led(stb), uart1(txd), sdio(d1) -mpp60 60 gpio, mss_gpio6, ptp(pulse), tdm(dtx), au(i2smclk), spi0(csn1), uart0(rts), led(data), uart1(rxd), sdio(d2) -mpp61 61 gpio, mss_gpio5, ptp(clk), tdm(pclk), au(i2sextclk), spi0(csn2), uart0(txd), uart2(txd), sata1(present_act), ge(mdio), sdio(d3) -mpp62 62 gpio, mss_gpio4, synce1(clk), ptp(pclk_out), sata1(present_act), spi0(csn3), uart0(rxd), uart2(rxd), sata0(present_act), ge(mdc) - -GPIO: ------ - -For common binding part and usage, refer to -Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml. - -Required properties: - -- compatible: "marvell,armada-8k-gpio" - -- offset: offset address inside the syscon block - -Example: - -CP110_LABEL(syscon0): system-controller@440000 { - compatible = "syscon", "simple-mfd"; - reg = <0x440000 0x1000>; - - CP110_LABEL(clk): clock { - compatible = "marvell,cp110-clock"; - #clock-cells = <2>; - }; - - CP110_LABEL(pinctrl): pinctrl { - compatible = "marvell,armada-8k-cpm-pinctrl"; - }; - - CP110_LABEL(gpio1): gpio@100 { - compatible = "marvell,armada-8k-gpio"; - offset = <0x100>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&CP110_LABEL(pinctrl) 0 0 32>; - }; - -}; diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 7360a2849b5b..6e2e0c551841 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -163,7 +163,6 @@ examples: method = "smc"; }; - - |+ // Case 3: PSCI v0.2 and PSCI v0.1. diff --git a/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml new file mode 100644 index 000000000000..6554e30018b3 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/eswin,eic7700-ahci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Eswin EIC7700 SoC SATA Controller + +maintainers: + - Yulin Lu <luyulin@eswincomputing.com> + - Huan He <hehuan1@eswincomputing.com> + +description: + AHCI SATA controller embedded into the EIC7700 SoC is based on the DWC AHCI + SATA v5.00a IP core. + +select: + properties: + compatible: + const: eswin,eic7700-ahci + required: + - compatible + +allOf: + - $ref: snps,dwc-ahci-common.yaml# + +properties: + compatible: + items: + - const: eswin,eic7700-ahci + - const: snps,dwc-ahci + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: pclk + - const: aclk + + resets: + maxItems: 1 + + reset-names: + const: arst + + ports-implemented: + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - phys + - phy-names + - ports-implemented + +unevaluatedProperties: false + +examples: + - | + sata@50420000 { + compatible = "eswin,eic7700-ahci", "snps,dwc-ahci"; + reg = <0x50420000 0x10000>; + interrupt-parent = <&plic>; + interrupts = <58>; + clocks = <&clock 171>, <&clock 186>; + clock-names = "pclk", "aclk"; + phys = <&sata_phy>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + resets = <&reset 96>; + reset-names = "arst"; + }; diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml index 4c848fcb5a5d..7707cbed2260 100644 --- a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml +++ b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml @@ -33,6 +33,10 @@ properties: - description: SPEAr1340 AHCI SATA device const: snps,spear-ahci + iommus: + minItems: 1 + maxItems: 3 + patternProperties: "^sata-port@[0-9a-e]$": $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml index 24c939f59091..cd5c2a532a92 100644 --- a/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml +++ b/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml @@ -43,7 +43,7 @@ properties: maximum: 20000000 patternProperties: - "^.*@[0-9a-fA-F]+$": + "@[0-9a-f]+$": type: object additionalProperties: true properties: diff --git a/Documentation/devicetree/bindings/bus/cznic,moxtet.yaml b/Documentation/devicetree/bindings/bus/cznic,moxtet.yaml new file mode 100644 index 000000000000..d340899ca5f1 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/cznic,moxtet.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/cznic,moxtet.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Turris Moxtet SPI bus + +maintainers: + - Marek Behún <kabel@kernel.org> + +description: > + Turris Mox module status and configuration bus (over SPI) + + The driver finds the devices connected to the bus by itself, but it may be + needed to reference some of them from other parts of the device tree. In that + case the devices can be defined as subnodes of the moxtet node. + +properties: + compatible: + const: cznic,moxtet + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + spi-cpol: true + + spi-cpha: true + + spi-max-frequency: true + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - spi-cpol + - spi-cpha + - interrupts + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: + type: object + + required: + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + moxtet@1 { + compatible = "cznic,moxtet"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + spi-max-frequency = <10000000>; + spi-cpol; + spi-cpha; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gpiosb>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + + gpio@0 { + compatible = "cznic,moxtet-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml b/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml index 4adbb7afa889..6645352c7f6b 100644 --- a/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml +++ b/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml @@ -70,7 +70,7 @@ properties: - const: ahb patternProperties: - "^.*@[0-9a-f]+$": + "@[0-9a-f]+$": description: Devices attached to the bus type: object diff --git a/Documentation/devicetree/bindings/bus/moxtet.txt b/Documentation/devicetree/bindings/bus/moxtet.txt deleted file mode 100644 index fb50fc865336..000000000000 --- a/Documentation/devicetree/bindings/bus/moxtet.txt +++ /dev/null @@ -1,46 +0,0 @@ -Turris Mox module status and configuration bus (over SPI) - -Required properties: - - compatible : Should be "cznic,moxtet" - - #address-cells : Has to be 1 - - #size-cells : Has to be 0 - - spi-cpol : Required inverted clock polarity - - spi-cpha : Required shifted clock phase - - interrupts : Must contain reference to the shared interrupt line - - interrupt-controller : Required - - #interrupt-cells : Has to be 1 - -For other required and optional properties of SPI slave nodes please refer to -../spi/spi-bus.txt. - -Required properties of subnodes: - - reg : Should be position on the Moxtet bus (how many Moxtet - modules are between this module and CPU module, so - either 0 or a positive integer) - -The driver finds the devices connected to the bus by itself, but it may be -needed to reference some of them from other parts of the device tree. In that -case the devices can be defined as subnodes of the moxtet node. - -Example: - - moxtet@1 { - compatible = "cznic,moxtet"; - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - spi-max-frequency = <10000000>; - spi-cpol; - spi-cpha; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gpiosb>; - interrupts = <5 IRQ_TYPE_EDGE_FALLING>; - - moxtet_sfp: gpio@0 { - compatible = "cznic,moxtet-gpio"; - gpio-controller; - #gpio-cells = <2>; - reg = <0>; - } - }; diff --git a/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml b/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml index d12b62a3a5a8..bf0af3424c9a 100644 --- a/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml +++ b/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml @@ -44,7 +44,7 @@ properties: Contains the firewall ID associated to the peripheral. patternProperties: - "^.*@[0-9a-f]+$": + "@[0-9a-f]+$": description: Peripherals type: object diff --git a/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml b/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml index 20acd1a6b173..9eb0b48b4f51 100644 --- a/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml +++ b/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml @@ -60,7 +60,7 @@ properties: Contains the firewall ID associated to the peripheral. patternProperties: - "^.*@[0-9a-f]+$": + "@[0-9a-f]+$": description: Peripherals type: object diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml index c4714d0fbe07..e588a7e8f260 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml @@ -132,7 +132,6 @@ examples: "ahb_mp", "ahb_mali400"; }; - - | clk@1c20068 { #clock-cells = <1>; diff --git a/Documentation/devicetree/bindings/clock/marvell,ap80x-clock.yaml b/Documentation/devicetree/bindings/clock/marvell,ap80x-clock.yaml new file mode 100644 index 000000000000..43b0631ba167 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,ap80x-clock.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/marvell,ap80x-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada AP80x System Controller Clocks + +maintainers: + - Gregory Clement <gregory.clement@bootlin.com> + - Miquel Raynal <miquel.raynal@bootlin.com> + +description: > + The AP806/AP807 is one of the two core HW blocks of the Marvell Armada + 7K/8K/931x SoCs. It contains system controllers, which provide several + registers giving access to numerous features: clocks, pin-muxing and many + other SoC configuration items. + +properties: + compatible: + enum: + - marvell,ap806-clock + - marvell,ap806-cpu-clock + - marvell,ap807-clock + - marvell,ap807-cpu-clock + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + clocks: + items: + - description: cluster 0 parent clock phandle + - description: cluster 1 parent clock phandle + +required: + - compatible + - "#clock-cells" + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + enum: + - marvell,ap806-cpu-clock + - marvell,ap807-cpu-clock + then: + required: + - clocks diff --git a/Documentation/devicetree/bindings/clock/marvell,cp110-clock.yaml b/Documentation/devicetree/bindings/clock/marvell,cp110-clock.yaml new file mode 100644 index 000000000000..ad0bc79b24c6 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,cp110-clock.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/marvell,cp110-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada CP110 System Controller Clocks + +maintainers: + - Gregory Clement <gregory.clement@bootlin.com> + - Miquel Raynal <miquel.raynal@bootlin.com> + +description: > + The CP110 is one of the two core HW blocks of the Marvell Armada 7K/8K/931x + SoCs. It contains system controllers, which provide several registers giving + access to numerous features: clocks, pin-muxing and many other SoC + configuration items. + +properties: + compatible: + const: marvell,cp110-clock + + "#clock-cells": + const: 2 + description: > + The first cell must be 0 or 1. 0 for the core clocks and 1 for the + gateable clocks. The second cell identifies the particular core clock or + gateable clocks. + + The following clocks are available: + + - Core clocks + - 0 0 APLL + - 0 1 PPv2 core + - 0 2 EIP + - 0 3 Core + - 0 4 NAND core + - 0 5 SDIO core + + - Gateable clocks + - 1 0 Audio + - 1 1 Comm Unit + - 1 2 NAND + - 1 3 PPv2 + - 1 4 SDIO + - 1 5 MG Domain + - 1 6 MG Core + - 1 7 XOR1 + - 1 8 XOR0 + - 1 9 GOP DP + - 1 11 PCIe x1 0 + - 1 12 PCIe x1 1 + - 1 13 PCIe x4 + - 1 14 PCIe / XOR + - 1 15 SATA + - 1 16 SATA USB + - 1 17 Main + - 1 18 SD/MMC/GOP + - 1 21 Slow IO (SPI, NOR, BootROM, I2C, UART) + - 1 22 USB3H0 + - 1 23 USB3H1 + - 1 24 USB3 Device + - 1 25 EIP150 + - 1 26 EIP197 + +required: + - compatible + - "#clock-cells" + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml index a9ba21144a56..13bb616249a1 100644 --- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.yaml @@ -37,7 +37,7 @@ properties: '#clock-cells': const: 1 - "#reset-cells": + '#reset-cells': const: 1 nvidia,external-memory-controller: @@ -46,7 +46,7 @@ properties: phandle of the external memory controller node patternProperties: - "^emc-timings-[0-9]+$": + '^emc-timings-[0-9]+$': type: object properties: nvidia,ram-code: @@ -56,7 +56,7 @@ patternProperties: this timing set is used for patternProperties: - "^timing-[0-9]+$": + '^timing-[0-9]+$': type: object properties: clock-frequency: @@ -94,7 +94,7 @@ required: - compatible - reg - '#clock-cells' - - "#reset-cells" + - '#reset-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml index bee2dd4b29bf..73cccc0df424 100644 --- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.yaml @@ -39,11 +39,11 @@ properties: '#clock-cells': const: 1 - "#reset-cells": + '#reset-cells': const: 1 patternProperties: - "^(sclk)|(pll-[cem])$": + '^(sclk)|(pll-[cem])$': type: object properties: compatible: @@ -76,7 +76,7 @@ required: - compatible - reg - '#clock-cells' - - "#reset-cells" + - '#reset-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml index 90cd3feab5fa..ab97d4b7dba8 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml @@ -8,7 +8,7 @@ title: Qualcomm RPM Clock Controller maintainers: - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: | The clock enumerators are defined in <dt-bindings/clock/qcom,rpmcc.h> and diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml index bc2fd3761328..655154534c0f 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml @@ -99,7 +99,6 @@ properties: the datasheet. const: 1 - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml index b44a76a958f4..b497c28e8094 100644 --- a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml @@ -22,7 +22,6 @@ properties: - xlnx,clocking-wizard-v6.0 - xlnx,versal-clk-wizard - reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml index 98e8240a05bd..995b3ef408b7 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml @@ -121,5 +121,4 @@ examples: }; }; - ... diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml index 895506d93f4c..85a6086cc10e 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml @@ -121,5 +121,4 @@ examples: }; }; - ... diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml index 60fd927b5a06..c43b02ec884f 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml @@ -142,7 +142,6 @@ then: reset-names: minItems: 2 - additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml b/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml index cb0a90f02321..3ae45db85ea7 100644 --- a/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml +++ b/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml @@ -25,7 +25,6 @@ description: | M |-------|______|----|____________| |________________| | | ___|__________________________________________________________|_______________| - VIU: Video Input Unit --------------------- diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml index 6d11f5955b51..c1cefd547391 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml @@ -56,22 +56,12 @@ properties: - const: cec interrupts: - items: - - description: CEC TX interrupt - - description: CEC RX interrupt - - description: CEC stuck at low interrupt - - description: Wake-up interrupt - - description: Hotplug connected interrupt - - description: Hotplug removed interrupt + minItems: 5 + maxItems: 6 interrupt-names: - items: - - const: cec-tx - - const: cec-rx - - const: cec-low - - const: wakeup - - const: hpd-connected - - const: hpd-removed + minItems: 5 + maxItems: 6 ddc: $ref: /schemas/types.yaml#/definitions/phandle @@ -112,6 +102,61 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - brcm,bcm2711-hdmi0 + - brcm,bcm2711-hdmi1 + then: + properties: + interrupts: + items: + - description: CEC TX interrupt + - description: CEC RX interrupt + - description: CEC stuck at low interrupt + - description: Wake-up interrupt + - description: Hotplug connected interrupt + - description: Hotplug removed interrupt + interrupt-names: + items: + - const: cec-tx + - const: cec-rx + - const: cec-low + - const: wakeup + - const: hpd-connected + - const: hpd-removed + + - if: + properties: + compatible: + contains: + enum: + - brcm,bcm2712-hdmi0 + - brcm,bcm2712-hdmi1 + then: + properties: + interrupts: + items: + - description: CEC TX interrupt + - description: CEC RX interrupt + - description: CEC stuck at low interrupt + - description: Hotplug connected interrupt + - description: Hotplug removed interrupt + interrupts-names: + items: + - const: cec-tx + - const: cec-rx + - const: cec-low + - const: hpd-connected + - const: hpd-removed + + required: + - interrupts + - interrupt-names + examples: - | hdmi0: hdmi@7ef00700 { @@ -136,6 +181,9 @@ examples: "hd"; clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; clock-names = "hdmi", "bvb", "audio", "cec"; + interrupts = <0>, <1>, <2>, <3>, <4>, <5>; + interrupt-names = "cec-tx", "cec-rx", "cec-low", "wakeup", + "hpd-connected", "hpd-removed"; resets = <&dvp 0>; ddc = <&ddc0>; }; diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml index f91c9dce2a44..9aca38a58a16 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml +++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml @@ -20,11 +20,20 @@ properties: maxItems: 1 interrupts: - maxItems: 1 + minItems: 1 + maxItems: 3 + + interrupt-names: + minItems: 1 + maxItems: 3 clocks: - maxItems: 1 - description: Core Clock + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 required: - compatible @@ -33,17 +42,68 @@ required: additionalProperties: false -if: - properties: - compatible: - contains: - enum: - - brcm,bcm2711-hvs - - brcm,bcm2712-hvs - -then: - required: - - clocks +allOf: + - if: + properties: + compatible: + contains: + const: brcm,bcm2711-hvs + + then: + properties: + clocks: + items: + - description: Core Clock + interrupts: + maxItems: 1 + clock-names: false + interrupt-names: false + + required: + - clocks + + - if: + properties: + compatible: + contains: + const: brcm,bcm2712-hvs + + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: core + - const: disp + interrupts: + items: + - description: Channel 0 End of frame + - description: Channel 1 End of frame + - description: Channel 2 End of frame + interrupt-names: + items: + - const: ch0-eof + - const: ch1-eof + - const: ch2-eof + required: + - clocks + - clock-names + - interrupt-names + + - if: + properties: + compatible: + contains: + const: brcm,bcm2835-hvs + + then: + properties: + interrupts: + maxItems: 1 + clock-names: false + interrupt-names: false examples: - | diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml index 5bbe81862c8f..d29a0d06187e 100644 --- a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml +++ b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml @@ -156,7 +156,6 @@ else: adi,input-style: false adi,input-justification: false - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml index 05442d437755..6211ab8bbb0e 100644 --- a/Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8mp-hdmi-tx.yaml @@ -49,6 +49,10 @@ properties: $ref: /schemas/graph.yaml#/properties/port description: HDMI output port + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: Parallel audio input port + required: - port@0 - port@1 @@ -98,5 +102,13 @@ examples: remote-endpoint = <&hdmi0_con>; }; }; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&pai_to_hdmi_tx>; + }; + }; }; }; diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml index ba644c30dcf4..17d1f97ce8c2 100644 --- a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml @@ -19,6 +19,7 @@ properties: compatible: enum: - ite,it66121 + - ite,it66122 - ite,it6610 reg: diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml index 0487bbffd7f7..4f7d3e9cf0c2 100644 --- a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml @@ -131,7 +131,6 @@ required: additionalProperties: false - examples: - | lvds-encoder { diff --git a/Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml b/Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml index e6397ac2048b..235018a81e85 100644 --- a/Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml +++ b/Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Parade PS8622/PS8625 DisplayPort to LVDS Converter maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml index c167795c63f6..b95f10edd3a2 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml @@ -14,6 +14,9 @@ description: | R-Car Gen4 SoCs. The encoder can operate in either DSI or CSI-2 mode, with up to four data lanes. +allOf: + - $ref: /schemas/display/dsi-controller.yaml# + properties: compatible: enum: @@ -80,14 +83,14 @@ required: - resets - ports -additionalProperties: false +unevaluatedProperties: false examples: - | #include <dt-bindings/clock/r8a779a0-cpg-mssr.h> #include <dt-bindings/power/r8a779a0-sysc.h> - dsi0: dsi-encoder@fed80000 { + dsi@fed80000 { compatible = "renesas,r8a779a0-dsi-csi2-tx"; reg = <0xfed80000 0x10000>; power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; @@ -117,4 +120,51 @@ examples: }; }; }; + + - | + #include <dt-bindings/clock/r8a779g0-cpg-mssr.h> + #include <dt-bindings/power/r8a779g0-sysc.h> + + dsi@fed80000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,r8a779g0-dsi-csi2-tx"; + reg = <0xfed80000 0x10000>; + clocks = <&cpg CPG_MOD 415>, + <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, + <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; + clock-names = "fck", "dsi", "pll"; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 415>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + + dsi0port1_out: endpoint { + remote-endpoint = <&panel_in>; + data-lanes = <1 2>; + }; + }; + }; + + panel@0 { + reg = <0>; + compatible = "raspberrypi,dsi-7inch", "ilitek,ili9881c"; + power-supply = <&vcc_lcd_reg>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi0port1_out>; + }; + }; + }; + }; ... diff --git a/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml b/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml index 6d1a36b76fcb..a5fe46de3535 100644 --- a/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml +++ b/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Silicon Image SiI8620 HDMI/MHL bridge maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml b/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml index 9ef587d46506..20c7e0a77802 100644 --- a/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml +++ b/Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml @@ -27,7 +27,9 @@ properties: - const: adi,adv7123 - enum: - adi,adv7123 + - asl-tek,cs5263 - dumb-vga-dac + - parade,ps185hdm - radxa,ra620 - realtek,rtd2171 - ti,opa362 diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml index b78f64c9c5f4..70f229dc4e0c 100644 --- a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml +++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml @@ -123,7 +123,6 @@ properties: - required: - port@1 - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml b/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml index 9cc1fd0751cd..7d78edc403dc 100644 --- a/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml +++ b/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml @@ -54,7 +54,6 @@ examples: #address-cells = <1>; #size-cells = <0>; - display@0{ compatible = "waveshare,rpi-lcd-35", "ilitek,ili9486"; reg = <0>; diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pai.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pai.yaml new file mode 100644 index 000000000000..4f99682a308d --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pai.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pai.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8MP HDMI Parallel Audio Interface + +maintainers: + - Shengjiu Wang <shengjiu.wang@nxp.com> + +description: + The HDMI TX Parallel Audio Interface (HTX_PAI) is a bridge between the + Audio Subsystem to the HDMI TX Controller. + +properties: + compatible: + const: fsl,imx8mp-hdmi-pai + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: apb + + power-domains: + maxItems: 1 + + port: + $ref: /schemas/graph.yaml#/properties/port + description: Output to the HDMI TX controller. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + - port + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mp-clock.h> + #include <dt-bindings/power/imx8mp-power.h> + + audio-bridge@32fc4800 { + compatible = "fsl,imx8mp-hdmi-pai"; + reg = <0x32fc4800 0x800>; + interrupt-parent = <&irqsteer_hdmi>; + interrupts = <14>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>; + clock-names = "apb"; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PAI>; + + port { + pai_to_hdmi_tx: endpoint { + remote-endpoint = <&hdmi_tx_from_pai>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index aeb4e4f36044..ebda78db87a6 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -18,6 +18,7 @@ properties: compatible: oneOf: - enum: + - qcom,glymur-dp - qcom,sa8775p-dp - qcom,sc7180-dp - qcom,sc7280-dp @@ -33,6 +34,11 @@ properties: - items: - enum: + - qcom,qcs8300-dp + - const: qcom,sa8775p-dp + + - items: + - enum: - qcom,sm6350-dp - const: qcom,sc7180-dp @@ -55,6 +61,12 @@ properties: - items: - enum: + - qcom,sm6150-dp + - const: qcom,sm8150-dp + - const: qcom,sm8350-dp + + - items: + - enum: - qcom,sm8750-dp - const: qcom,sm8650-dp @@ -195,9 +207,11 @@ allOf: compatible: contains: enum: + - qcom,glymur-dp - qcom,sa8775p-dp - qcom,x1e80100-dp then: + $ref: /schemas/sound/dai-common.yaml# oneOf: - required: - aux-bus @@ -239,6 +253,7 @@ allOf: enum: # these platforms support 2 streams MST on some interfaces, # others are SST only + - qcom,glymur-dp - qcom,sc8280xp-dp - qcom,x1e80100-dp then: @@ -295,7 +310,7 @@ allOf: minItems: 6 maxItems: 8 -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index afc187935744..e32056ae0f5d 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -21,7 +21,7 @@ properties: compatible: oneOf: - items: - - pattern: '^qcom,adreno-gmu-[67][0-9][0-9]\.[0-9]$' + - pattern: '^qcom,adreno-gmu-[6-8][0-9][0-9]\.[0-9]$' - const: qcom,adreno-gmu - items: - pattern: '^qcom,adreno-gmu-x[1-9][0-9][0-9]\.[0-9]$' @@ -303,6 +303,64 @@ allOf: properties: compatible: contains: + const: qcom,adreno-gmu-840.1 + then: + properties: + reg: + items: + - description: Core GMU registers + reg-names: + items: + - const: gmu + clocks: + items: + - description: GPU AHB clock + - description: GMU clock + - description: GPU CX clock + - description: GPU MEMNOC clock + - description: GMU HUB clock + clock-names: + items: + - const: ahb + - const: gmu + - const: cxo + - const: memnoc + - const: hub + + - if: + properties: + compatible: + contains: + const: qcom,adreno-gmu-x285.1 + then: + properties: + reg: + items: + - description: Core GMU registers + reg-names: + items: + - const: gmu + clocks: + items: + - description: GPU AHB clock + - description: GMU clock + - description: GPU CX clock + - description: GPU MEMNOC clock + - description: GMU HUB clock + - description: GMU RSCC HUB clock + clock-names: + items: + - const: ahb + - const: gmu + - const: cxo + - const: memnoc + - const: hub + - const: rscc + + - if: + properties: + compatible: + contains: const: qcom,adreno-gmu-wrapper then: properties: diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 3696b083e353..826aafdcc20b 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -133,7 +133,6 @@ properties: For GMU attached devices a phandle to the GMU device that will control the power for the GPU. - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/display/msm/qcom,glymur-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,glymur-mdss.yaml new file mode 100644 index 000000000000..2329ed96e6cb --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,glymur-mdss.yaml @@ -0,0 +1,264 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,glymur-mdss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Glymur Display MDSS + +maintainers: + - Abel Vesa <abel.vesa@linaro.org> + +description: + Glymur MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like + DPU display controller, DP interfaces, etc. + +$ref: /schemas/display/msm/mdss-common.yaml# + +properties: + compatible: + const: qcom,glymur-mdss + + clocks: + items: + - description: Display AHB + - description: Display hf AXI + - description: Display core + + iommus: + maxItems: 1 + + interconnects: + items: + - description: Interconnect path from mdp0 port to the data bus + - description: Interconnect path from CPU to the reg bus + + interconnect-names: + items: + - const: mdp0-mem + - const: cpu-cfg + +patternProperties: + "^display-controller@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + const: qcom,glymur-dpu + + "^displayport-controller@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + const: qcom,glymur-dp + + "^phy@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + const: qcom,glymur-dp-phy + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + #include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interconnect/qcom,glymur-rpmh.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/phy/phy-qcom-qmp.h> + #include <dt-bindings/power/qcom,rpmhpd.h> + + display-subsystem@ae00000 { + compatible = "qcom,glymur-mdss"; + reg = <0x0ae00000 0x1000>; + reg-names = "mdss"; + + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&dispcc_ahb_clk>, + <&gcc_disp_hf_axi_clk>, + <&dispcc_mdp_clk>; + clock-names = "bus", "nrt_bus", "core"; + + interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&hsc_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + interconnect-names = "mdp0-mem", + "cpu-cfg"; + + resets = <&disp_cc_mdss_core_bcr>; + + power-domains = <&mdss_gdsc>; + + iommus = <&apps_smmu 0x1c00 0x2>; + + interrupt-controller; + #interrupt-cells = <1>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + display-controller@ae01000 { + compatible = "qcom,glymur-dpu"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&gcc_axi_clk>, + <&dispcc_ahb_clk>, + <&dispcc_mdp_lut_clk>, + <&dispcc_mdp_clk>, + <&dispcc_mdp_vsync_clk>; + clock-names = "nrt_bus", + "iface", + "lut", + "core", + "vsync"; + + assigned-clocks = <&dispcc_mdp_vsync_clk>; + assigned-clock-rates = <19200000>; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + dpu_intf2_out: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-325000000 { + opp-hz = /bits/ 64 <325000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-375000000 { + opp-hz = /bits/ 64 <375000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-514000000 { + opp-hz = /bits/ 64 <514000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + + displayport-controller@ae90000 { + compatible = "qcom,glymur-dp"; + reg = <0xae90000 0x200>, + <0xae90200 0x200>, + <0xae90400 0x600>, + <0xae91000 0x400>, + <0xae91400 0x400>; + + interrupt-parent = <&mdss>; + interrupts = <12>; + + clocks = <&dispcc_mdss_ahb_clk>, + <&dispcc_dptx0_aux_clk>, + <&dispcc_dptx0_link_clk>, + <&dispcc_dptx0_link_intf_clk>, + <&dispcc_dptx0_pixel0_clk>, + <&dispcc_dptx0_pixel1_clk>; + clock-names = "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel", + "stream_1_pixel"; + + assigned-clocks = <&dispcc_mdss_dptx0_link_clk_src>, + <&dispcc_mdss_dptx0_pixel0_clk_src>, + <&dispcc_mdss_dptx0_pixel1_clk_src>; + assigned-clock-parents = <&usb_1_ss0_qmpphy QMP_USB43DP_DP_LINK_CLK>, + <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, + <&usb_1_ss0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; + + operating-points-v2 = <&mdss_dp0_opp_table>; + + power-domains = <&rpmhpd RPMHPD_MMCX>; + + phys = <&usb_1_ss0_qmpphy QMP_USB43DP_DP_PHY>; + phy-names = "dp"; + + #sound-dai-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss_dp0_in: endpoint { + remote-endpoint = <&mdss_intf0_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dp0_out: endpoint { + }; + }; + }; + + mdss_dp0_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml new file mode 100644 index 000000000000..e96baaae9ba9 --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml @@ -0,0 +1,286 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,qcs8300-mdss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. QCS8300 Display MDSS + +maintainers: + - Yongxing Mou <yongxing.mou@oss.qualcomm.com> + +description: + QCS8300 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like + DPU display controller, DP interfaces and EDP etc. + +$ref: /schemas/display/msm/mdss-common.yaml# + +properties: + compatible: + const: qcom,qcs8300-mdss + + clocks: + items: + - description: Display AHB + - description: Display hf AXI + - description: Display core + + iommus: + maxItems: 1 + + interconnects: + maxItems: 3 + + interconnect-names: + maxItems: 3 + +patternProperties: + "^display-controller@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + contains: + const: qcom,qcs8300-dpu + + "^displayport-controller@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + contains: + const: qcom,qcs8300-dp + + "^phy@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + contains: + const: qcom,qcs8300-edp-phy + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,qcs8300-gcc.h> + #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> + #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h> + #include <dt-bindings/power/qcom,rpmhpd.h> + #include <dt-bindings/power/qcom-rpmpd.h> + + mdss: display-subsystem@ae00000 { + compatible = "qcom,qcs8300-mdss"; + reg = <0x0ae00000 0x1000>; + reg-names = "mdss"; + + interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + interconnect-names = "mdp0-mem", + "mdp1-mem", + "cpu-cfg"; + + resets = <&dispcc_core_bcr>; + power-domains = <&dispcc_gdsc>; + + clocks = <&dispcc_ahb_clk>, + <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc_mdp_clk>; + + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + + iommus = <&apps_smmu 0x1000 0x402>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + display-controller@ae01000 { + compatible = "qcom,qcs8300-dpu", "qcom,sa8775p-dpu"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_MDP_LUT_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_MDP_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>; + clock-names = "nrt_bus", + "iface", + "lut", + "core", + "vsync"; + + assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_VSYNC_CLK>; + assigned-clock-rates = <19200000>; + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + + dpu_intf0_out: endpoint { + remote-endpoint = <&mdss_dp0_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-375000000 { + opp-hz = /bits/ 64 <375000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + + opp-575000000 { + opp-hz = /bits/ 64 <575000000>; + required-opps = <&rpmhpd_opp_turbo>; + }; + + opp-650000000 { + opp-hz = /bits/ 64 <650000000>; + required-opps = <&rpmhpd_opp_turbo_l1>; + }; + }; + }; + + mdss_dp0_phy: phy@aec2a00 { + compatible = "qcom,qcs8300-edp-phy", "qcom,sa8775p-edp-phy"; + + reg = <0x0aec2a00 0x200>, + <0x0aec2200 0xd0>, + <0x0aec2600 0xd0>, + <0x0aec2000 0x1c8>; + + clocks = <&dispcc MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>, + <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>; + clock-names = "aux", + "cfg_ahb"; + + #clock-cells = <1>; + #phy-cells = <0>; + + vdda-phy-supply = <&vreg_l1c>; + vdda-pll-supply = <&vreg_l4a>; + }; + + displayport-controller@af54000 { + compatible = "qcom,qcs8300-dp", "qcom,sa8775p-dp"; + + pinctrl-0 = <&dp_hot_plug_det>; + pinctrl-names = "default"; + + reg = <0xaf54000 0x104>, + <0xaf54200 0x0c0>, + <0xaf55000 0x770>, + <0xaf56000 0x09c>, + <0xaf57000 0x09c>, + <0xaf58000 0x09c>, + <0xaf59000 0x09c>, + <0xaf5a000 0x23c>, + <0xaf5b000 0x23c>; + + interrupt-parent = <&mdss>; + interrupts = <12>; + clocks = <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL2_CLK>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL3_CLK>; + clock-names = "core_iface", + "core_aux", + "ctrl_link", + "ctrl_link_iface", + "stream_pixel", + "stream_1_pixel", + "stream_2_pixel", + "stream_3_pixel"; + assigned-clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL2_CLK_SRC>, + <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_PIXEL3_CLK_SRC>; + assigned-clock-parents = <&mdss_dp0_phy 0>, + <&mdss_dp0_phy 1>, + <&mdss_dp0_phy 1>, + <&mdss_dp0_phy 1>; + phys = <&mdss_dp0_phy>; + phy-names = "dp"; + operating-points-v2 = <&dp_opp_table>; + power-domains = <&rpmhpd RPMHPD_MMCX>; + + #sound-dai-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + mdss_dp0_in: endpoint { + remote-endpoint = <&dpu_intf0_out>; + }; + }; + + port@1 { + reg = <1>; + + mdss_dp_out: endpoint { }; + }; + }; + + dp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-270000000 { + opp-hz = /bits/ 64 <270000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6150-mdss.yaml index 9ac24f99d3ad..46e9335f849f 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm6150-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6150-mdss.yaml @@ -51,6 +51,14 @@ patternProperties: compatible: const: qcom,sm6150-dpu + "^displayport-controller@[0-9a-f]+$": + type: object + additionalProperties: true + properties: + compatible: + contains: + const: qcom,sm6150-dp + "^dsi@[0-9a-f]+$": type: object additionalProperties: true @@ -130,35 +138,37 @@ examples: #size-cells = <0>; port@0 { - reg = <0>; - dpu_intf0_out: endpoint { - }; + reg = <0>; + + dpu_intf0_out: endpoint { + }; }; port@1 { - reg = <1>; - dpu_intf1_out: endpoint { - remote-endpoint = <&mdss_dsi0_in>; - }; + reg = <1>; + + dpu_intf1_out: endpoint { + remote-endpoint = <&mdss_dsi0_in>; + }; }; }; mdp_opp_table: opp-table { compatible = "operating-points-v2"; - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; - required-opps = <&rpmhpd_opp_low_svs>; + opp-192000000 { + opp-hz = /bits/ 64 <192000000>; + required-opps = <&rpmhpd_opp_low_svs>; }; - opp-25600000 { - opp-hz = /bits/ 64 <25600000>; - required-opps = <&rpmhpd_opp_svs>; + opp-256000000 { + opp-hz = /bits/ 64 <256000000>; + required-opps = <&rpmhpd_opp_svs>; }; opp-307200000 { - opp-hz = /bits/ 64 <307200000>; - required-opps = <&rpmhpd_opp_nom>; + opp-hz = /bits/ 64 <307200000>; + required-opps = <&rpmhpd_opp_nom>; }; }; }; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml index 0a46120dd868..fe296e3186d0 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml @@ -13,11 +13,17 @@ $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: - enum: - - qcom,sa8775p-dpu - - qcom,sm8650-dpu - - qcom,sm8750-dpu - - qcom,x1e80100-dpu + oneOf: + - enum: + - qcom,glymur-dpu + - qcom,sa8775p-dpu + - qcom,sm8650-dpu + - qcom,sm8750-dpu + - qcom,x1e80100-dpu + - items: + - enum: + - qcom,qcs8300-dpu + - const: qcom,sa8775p-dpu reg: items: diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml index 4151f475f3bc..d55fda9a523e 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SM8750 Display MDSS maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,il79900a.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,il79900a.yaml new file mode 100644 index 000000000000..02f7fb1f16dc --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/ilitek,il79900a.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/ilitek,il79900a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ilitek IL79900a based MIPI-DSI panels + +maintainers: + - Langyan Ye <yelangyan@huaqin.corp-partner.google.com> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - enum: + - tianma,tl121bvms07-00 + - const: ilitek,il79900a + + reg: + maxItems: 1 + description: DSI virtual channel used by the panel + + enable-gpios: + maxItems: 1 + description: GPIO specifier for the enable pin + + avdd-supply: + description: Positive analog voltage supply (AVDD) + + avee-supply: + description: Negative analog voltage supply (AVEE) + + pp1800-supply: + description: 1.8V logic voltage supply + + backlight: true + +required: + - compatible + - reg + - enable-gpios + - avdd-supply + - avee-supply + - pp1800-supply + +additionalProperties: false + +examples: + - | + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "tianma,tl121bvms07-00", "ilitek,il79900a"; + reg = <0>; + enable-gpios = <&pio 25 0>; + avdd-supply = <®_avdd>; + avee-supply = <®_avee>; + pp1800-supply = <®_pp1800>; + backlight = <&backlight>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml index 434cc6af9c95..d979701a00a8 100644 --- a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml +++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml @@ -20,9 +20,11 @@ properties: - bananapi,lhr050h41 - bestar,bsd1218-a101kl68 - feixin,k101-im2byl02 + - raspberrypi,dsi-5inch - raspberrypi,dsi-7inch - startek,kd050hdfia020 - tdo,tl050hdv35 + - wanchanglong,w552946aaa - wanchanglong,w552946aba - const: ilitek,ili9881c @@ -30,6 +32,7 @@ properties: maxItems: 1 backlight: true + port: true power-supply: true reset-gpios: true rotation: true diff --git a/Documentation/devicetree/bindings/display/panel/lg,ld070wx3-sl01.yaml b/Documentation/devicetree/bindings/display/panel/lg,ld070wx3-sl01.yaml new file mode 100644 index 000000000000..0f0b9079f199 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/lg,ld070wx3-sl01.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/lg,ld070wx3-sl01.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LG Corporation 7" WXGA TFT LCD panel + +maintainers: + - Svyatoslav Ryhel <clamor95@gmail.com> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - const: lg,ld070wx3-sl01 + + reg: + maxItems: 1 + + vdd-supply: true + vcc-supply: true + + backlight: true + port: true + +required: + - compatible + - vdd-supply + - vcc-supply + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "lg,ld070wx3-sl01"; + reg = <0>; + + vdd-supply = <&vdd_3v3_lcd>; + vcc-supply = <&vcc_1v8_lcd>; + + backlight = <&backlight>; + + port { + endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml index 4388d5375851..dbc01e640895 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml @@ -59,6 +59,8 @@ properties: # Jenson Display BL-JT60050-01A 7" WSVGA (1024x600) color TFT LCD LVDS panel - jenson,bl-jt60050-01a - tbs,a711-panel + # Winstar WF70A8SYJHLNGA 7" WSVGA (1024x600) color TFT LCD LVDS panel + - winstar,wf70a8syjhlnga - const: panel-lvds diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml index 9b92a05791cc..8d668979b62d 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml @@ -19,6 +19,9 @@ description: | If the panel is more advanced a dedicated binding file is required. +allOf: + - $ref: panel-common.yaml# + properties: compatible: @@ -42,8 +45,6 @@ properties: - kingdisplay,kd097d04 # LG ACX467AKM-7 4.95" 1080×1920 LCD Panel - lg,acx467akm-7 - # LG Corporation 7" WXGA TFT LCD panel - - lg,ld070wx3-sl01 # LG Corporation 5" HD TFT LCD panel - lg,lh500wx1-sd03 # Lincoln LCD197 5" 1080x1920 LCD panel @@ -56,10 +57,6 @@ properties: - panasonic,vvx10f034n00 # Samsung s6e3fa7 1080x2220 based AMS559NK06 AMOLED panel - samsung,s6e3fa7-ams559nk06 - # Samsung s6e3fc2x01 1080x2340 AMOLED panel - - samsung,s6e3fc2x01 - # Samsung sofef00 1080x2280 AMOLED panel - - samsung,sofef00 # Shangai Top Display Optoelectronics 7" TL070WSH30 1024x600 TFT LCD panel - tdo,tl070wsh30 @@ -72,31 +69,12 @@ properties: reset-gpios: true port: true power-supply: true - vddio-supply: true - -allOf: - - $ref: panel-common.yaml# - - if: - properties: - compatible: - enum: - - samsung,s6e3fc2x01 - - samsung,sofef00 - then: - properties: - power-supply: false - required: - - vddio-supply - else: - properties: - vddio-supply: false - required: - - power-supply additionalProperties: false required: - compatible + - power-supply - reg examples: diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 2017428d8828..24e277b19094 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -184,6 +184,8 @@ properties: - innolux,n156bge-l21 # Innolux Corporation 7.0" WSVGA (1024x600) TFT LCD panel - innolux,zj070na-01p + # JuTouch Technology Co.. 10" JT101TM023 WXGA (1280 x 800) LVDS panel + - jutouch,jt101tm023 # Kaohsiung Opto-Electronics Inc. 5.7" QVGA (320 x 240) TFT LCD panel - koe,tx14d24vm1bpa # Kaohsiung Opto-Electronics. TX31D200VM0BAA 12.3" HSXGA LVDS panel @@ -268,6 +270,8 @@ properties: - qiaodian,qd43003c0-40 # Shenzhen QiShenglong Industrialist Co., Ltd. Gopher 2b 4.3" 480(RGB)x272 TFT LCD panel - qishenglong,gopher2b-lcd + # Raystar Optronics, Inc. RFF500F-AWH-DNN 5.0" TFT 840x480 + - raystar,rff500f-awh-dnn # Rocktech Displays Ltd. RK101II01D-CT 10.1" TFT 1280x800 - rocktech,rk101ii01d-ct # Rocktech Display Ltd. RK070ER9427 800(RGB)x480 TFT LCD panel @@ -276,6 +280,8 @@ properties: - rocktech,rk043fn48h # Samsung Electronics 10.1" WXGA (1280x800) TFT LCD panel - samsung,ltl101al01 + # Samsung Electronics 10.6" FWXGA (1366x768) TFT LCD panel + - samsung,ltl106al01 # Samsung Electronics 10.1" WSVGA TFT LCD panel - samsung,ltn101nt05 # Satoz SAT050AT40H12R2 5.0" WVGA TFT LCD panel diff --git a/Documentation/devicetree/bindings/display/panel/panel-timing.yaml b/Documentation/devicetree/bindings/display/panel/panel-timing.yaml index aea69b84ca5d..8c9774458777 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-timing.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-timing.yaml @@ -41,7 +41,6 @@ description: | | | | v | | +-------+----------+-------------------------------------+----------+ - The following is the panel timings shown with time on the x-axis. This matches the timing diagrams often found in data sheets. diff --git a/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml b/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml index 04f86e0cbac9..694037301583 100644 --- a/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml +++ b/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml @@ -9,6 +9,9 @@ title: Ronbo RB070D30 DSI Display Panel maintainers: - Maxime Ripard <mripard@kernel.org> +allOf: + - $ref: panel-common.yaml# + properties: compatible: const: ronbo,rb070d30 @@ -20,10 +23,6 @@ properties: description: GPIO used for the power pin maxItems: 1 - reset-gpios: - description: GPIO used for the reset pin - maxItems: 1 - shlr-gpios: description: GPIO used for the shlr pin (horizontal flip) maxItems: 1 @@ -35,10 +34,6 @@ properties: vcc-lcd-supply: description: Power regulator - backlight: - description: Backlight used by the panel - $ref: /schemas/types.yaml#/definitions/phandle - required: - compatible - power-gpios @@ -47,5 +42,6 @@ required: - shlr-gpios - updn-gpios - vcc-lcd-supply + - port -additionalProperties: false +unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml index ccb574caed28..f1723e910252 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml +++ b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml @@ -33,6 +33,8 @@ properties: - samsung,atna45dc02 # Samsung 15.6" 3K (2880x1620 pixels) eDP AMOLED panel - samsung,atna56ac03 + # Samsung 16.0" 3K (2880x1800 pixels) eDP AMOLED panel + - samsung,atna60cl08 - const: samsung,atna33xc20 enable-gpios: true diff --git a/Documentation/devicetree/bindings/display/panel/samsung,s6e3fc2x01.yaml b/Documentation/devicetree/bindings/display/panel/samsung,s6e3fc2x01.yaml new file mode 100644 index 000000000000..d48354fb52ea --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/samsung,s6e3fc2x01.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/samsung,s6e3fc2x01.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S6E3FC2X01 AMOLED DDIC + +description: The S6E3FC2X01 is display driver IC with connected panel. + +maintainers: + - David Heidelberg <david@ixit.cz> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - enum: + # Samsung 6.41 inch, 1080x2340 pixels, 19.5:9 ratio + - samsung,s6e3fc2x01-ams641rw + - const: samsung,s6e3fc2x01 + + reg: + maxItems: 1 + + reset-gpios: true + + port: true + + vddio-supply: + description: VDD regulator + + vci-supply: + description: VCI regulator + + poc-supply: + description: POC regulator + +required: + - compatible + - reset-gpios + - vddio-supply + - vci-supply + - poc-supply + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "samsung,s6e3fc2x01-ams641rw", "samsung,s6e3fc2x01"; + reg = <0>; + + vddio-supply = <&vreg_l14a_1p88>; + vci-supply = <&s2dos05_buck1>; + poc-supply = <&s2dos05_ldo1>; + + te-gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&sde_dsi_active &sde_te_active_sleep>; + pinctrl-1 = <&sde_dsi_suspend &sde_te_active_sleep>; + pinctrl-names = "default", "sleep"; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/panel/samsung,sofef00.yaml b/Documentation/devicetree/bindings/display/panel/samsung,sofef00.yaml new file mode 100644 index 000000000000..eeee3cac72e3 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/samsung,sofef00.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/samsung,sofef00.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SOFEF00 AMOLED DDIC + +description: The SOFEF00 is display driver IC with connected panel. + +maintainers: + - David Heidelberg <david@ixit.cz> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - enum: + # Samsung 6.01 inch, 1080x2160 pixels, 18:9 ratio + - samsung,sofef00-ams601nt22 + # Samsung 6.28 inch, 1080x2280 pixels, 19:9 ratio + - samsung,sofef00-ams628nw01 + - const: samsung,sofef00 + + reg: + maxItems: 1 + + poc-supply: + description: POC regulator + + vci-supply: + description: VCI regulator + + vddio-supply: + description: VDD regulator + +required: + - compatible + - reset-gpios + - poc-supply + - vci-supply + - vddio-supply + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "samsung,sofef00-ams628nw01", "samsung,sofef00"; + reg = <0>; + + vddio-supply = <&vreg_l14a_1p88>; + vci-supply = <&s2dos05_buck1>; + poc-supply = <&s2dos05_ldo1>; + + te-gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&panel_active>; + pinctrl-1 = <&panel_suspend>; + pinctrl-names = "default", "sleep"; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/panel/sharp,lq079l1sx01.yaml b/Documentation/devicetree/bindings/display/panel/sharp,lq079l1sx01.yaml new file mode 100644 index 000000000000..08a35ebbbb3c --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/sharp,lq079l1sx01.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/sharp,lq079l1sx01.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sharp Microelectronics 7.9" WQXGA TFT LCD panel + +maintainers: + - Svyatoslav Ryhel <clamor95@gmail.com> + +description: > + This panel requires a dual-channel DSI host to operate and it supports + only left-right split mode, where each channel drives the left or right + half of the screen and only video mode. + + Each of the DSI channels controls a separate DSI peripheral. + The peripheral driven by the first link (DSI-LINK1), left one, is + considered the primary peripheral and controls the device. + +allOf: + - $ref: panel-common-dual.yaml# + +properties: + compatible: + const: sharp,lq079l1sx01 + + reg: + maxItems: 1 + + avdd-supply: + description: regulator that supplies the analog voltage + + vddio-supply: + description: regulator that supplies the I/O voltage + + vsp-supply: + description: positive boost supply regulator + + vsn-supply: + description: negative boost supply regulator + + reset-gpios: + maxItems: 1 + + backlight: true + ports: true + +required: + - compatible + - reg + - avdd-supply + - vddio-supply + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "sharp,lq079l1sx01"; + reg = <0>; + + reset-gpios = <&gpio 59 GPIO_ACTIVE_LOW>; + + avdd-supply = <&avdd_lcd>; + vddio-supply = <&vdd_lcd_io>; + vsp-supply = <&vsp_5v5_lcd>; + vsn-supply = <&vsn_5v5_lcd>; + + backlight = <&backlight>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + panel_in0: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + panel_in1: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/panel/synaptics,td4300-panel.yaml b/Documentation/devicetree/bindings/display/panel/synaptics,td4300-panel.yaml new file mode 100644 index 000000000000..152d94367130 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/synaptics,td4300-panel.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/synaptics,td4300-panel.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synaptics TDDI Display Panel Controller + +maintainers: + - Kaustabh Chakraborty <kauschluss@disroot.org> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + enum: + - syna,td4101-panel + - syna,td4300-panel + + reg: + maxItems: 1 + + vio-supply: + description: core I/O voltage supply + + vsn-supply: + description: negative voltage supply for analog circuits + + vsp-supply: + description: positive voltage supply for analog circuits + + backlight-gpios: + maxItems: 1 + description: backlight enable GPIO + + reset-gpios: true + width-mm: true + height-mm: true + panel-timing: true + +required: + - compatible + - reg + - width-mm + - height-mm + - panel-timing + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "syna,td4300-panel"; + reg = <0>; + + vio-supply = <&panel_vio_reg>; + vsn-supply = <&panel_vsn_reg>; + vsp-supply = <&panel_vsp_reg>; + + backlight-gpios = <&gpd3 5 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpd3 4 GPIO_ACTIVE_LOW>; + + width-mm = <68>; + height-mm = <121>; + + panel-timing { + clock-frequency = <144389520>; + + hactive = <1080>; + hsync-len = <4>; + hfront-porch = <120>; + hback-porch = <32>; + + vactive = <1920>; + vsync-len = <2>; + vfront-porch = <21>; + vback-porch = <4>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml b/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml index 59a373728e62..99db268eb9b3 100644 --- a/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml +++ b/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml @@ -38,7 +38,6 @@ description: |+ The serial protocol has line names that resemble I2C but the protocol is not I2C but 3WIRE SPI. - allOf: - $ref: panel-common.yaml# - $ref: /schemas/spi/spi-peripheral-props.yaml# diff --git a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml index 1e32d14b6edb..2cc66dcef870 100644 --- a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml +++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml @@ -25,6 +25,9 @@ properties: - enum: - renesas,r9a07g054-du # RZ/V2L - const: renesas,r9a07g044-du # RZ/G2L fallback + - items: + - const: renesas,r9a09g056-du # RZ/V2N + - const: renesas,r9a09g057-du # RZ/V2H(P) fallback reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml index a8a008717997..6345f0132d43 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml @@ -125,7 +125,6 @@ examples: power-domains = <&power RK3588_PD_VO0>; #sound-dai-cells = <0>; - ports { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml index c59df3c1a3f7..632b48bfabb9 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml @@ -17,6 +17,7 @@ properties: - rockchip,px30-mipi-dsi - rockchip,rk3128-mipi-dsi - rockchip,rk3288-mipi-dsi + - rockchip,rk3368-mipi-dsi - rockchip,rk3399-mipi-dsi - rockchip,rk3568-mipi-dsi - rockchip,rv1126-mipi-dsi @@ -73,6 +74,7 @@ allOf: enum: - rockchip,px30-mipi-dsi - rockchip,rk3128-mipi-dsi + - rockchip,rk3368-mipi-dsi - rockchip,rk3568-mipi-dsi - rockchip,rv1126-mipi-dsi diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml index 96b4b088eebe..d649808c59da 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml @@ -113,6 +113,14 @@ properties: description: Additional HDMI QP related data is accessed through VO GRF regs. + frl-enable-gpios: + description: + Optional GPIO line to be asserted when operating in HDMI 2.1 FRL mode and + deasserted for HDMI 1.4/2.0 TMDS. It can be used to control external + voltage bias for HDMI data lines. When not present the HDMI encoder will + operate in TMDS mode only. + maxItems: 1 + required: - compatible - reg @@ -132,8 +140,10 @@ unevaluatedProperties: false examples: - | #include <dt-bindings/clock/rockchip,rk3588-cru.h> + #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/pinctrl/rockchip.h> #include <dt-bindings/power/rk3588-power.h> #include <dt-bindings/reset/rockchip,rk3588-cru.h> @@ -164,6 +174,7 @@ examples: rockchip,grf = <&sys_grf>; rockchip,vo-grf = <&vo1_grf>; #sound-dai-cells = <0>; + frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; ports { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/display/simple-framebuffer.yaml b/Documentation/devicetree/bindings/display/simple-framebuffer.yaml index 296500f9da05..45ffdebc9d86 100644 --- a/Documentation/devicetree/bindings/display/simple-framebuffer.yaml +++ b/Documentation/devicetree/bindings/display/simple-framebuffer.yaml @@ -181,7 +181,6 @@ allOf: required: - amlogic,pipeline - additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/dma/apm,xgene-storm-dma.yaml b/Documentation/devicetree/bindings/dma/apm,xgene-storm-dma.yaml new file mode 100644 index 000000000000..9ca5f7848785 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/apm,xgene-storm-dma.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/apm,xgene-storm-dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene Storm SoC DMA + +maintainers: + - Khuong Dinh <khuong@os.amperecomputing.com> + +properties: + compatible: + const: apm,xgene-storm-dma + + reg: + items: + - description: DMA control and status registers + - description: Descriptor ring control and status registers + - description: Descriptor ring command registers + - description: SoC efuse registers + + interrupts: + items: + - description: DMA error reporting interrupt + - description: DMA channel 0 completion interrupt + - description: DMA channel 1 completion interrupt + - description: DMA channel 2 completion interrupt + - description: DMA channel 3 completion interrupt + + clocks: + maxItems: 1 + + dma-coherent: true + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + dma@1f270000 { + compatible = "apm,xgene-storm-dma"; + reg = <0x1f270000 0x10000>, + <0x1f200000 0x10000>, + <0x1b000000 0x400000>, + <0x1054a000 0x100>; + interrupts = <0x0 0x82 0x4>, + <0x0 0xb8 0x4>, + <0x0 0xb9 0x4>, + <0x0 0xba 0x4>, + <0x0 0xbb 0x4>; + dma-coherent; + clocks = <&dmaclk 0>; + }; diff --git a/Documentation/devicetree/bindings/dma/apm-xgene-dma.txt b/Documentation/devicetree/bindings/dma/apm-xgene-dma.txt deleted file mode 100644 index c53e0b08032f..000000000000 --- a/Documentation/devicetree/bindings/dma/apm-xgene-dma.txt +++ /dev/null @@ -1,47 +0,0 @@ -Applied Micro X-Gene SoC DMA nodes - -DMA nodes are defined to describe on-chip DMA interfaces in -APM X-Gene SoC. - -Required properties for DMA interfaces: -- compatible: Should be "apm,xgene-dma". -- device_type: set to "dma". -- reg: Address and length of the register set for the device. - It contains the information of registers in the following order: - 1st - DMA control and status register address space. - 2nd - Descriptor ring control and status register address space. - 3rd - Descriptor ring command register address space. - 4th - Soc efuse register address space. -- interrupts: DMA has 5 interrupts sources. 1st interrupt is - DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts - are completion interrupts for each DMA channels. -- clocks: Reference to the clock entry. - -Optional properties: -- dma-coherent : Present if dma operations are coherent - -Example: - dmaclk: dmaclk@1f27c000 { - compatible = "apm,xgene-device-clock"; - #clock-cells = <1>; - clocks = <&socplldiv2 0>; - reg = <0x0 0x1f27c000 0x0 0x1000>; - reg-names = "csr-reg"; - clock-output-names = "dmaclk"; - }; - - dma: dma@1f270000 { - compatible = "apm,xgene-storm-dma"; - device_type = "dma"; - reg = <0x0 0x1f270000 0x0 0x10000>, - <0x0 0x1f200000 0x0 0x10000>, - <0x0 0x1b000000 0x0 0x400000>, - <0x0 0x1054a000 0x0 0x100>; - interrupts = <0x0 0x82 0x4>, - <0x0 0xb8 0x4>, - <0x0 0xb9 0x4>, - <0x0 0xba 0x4>, - <0x0 0xbb 0x4>; - dma-coherent; - clocks = <&dmaclk 0>; - }; diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index c21a4f073f6c..18c0a7c18bc8 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -22,7 +22,6 @@ properties: - renesas,r9a06g032-dma - const: renesas,rzn1-dma - "#dma-cells": minimum: 3 maximum: 4 diff --git a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml index 7b94d24d5ef4..8b42d9880400 100644 --- a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml +++ b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml @@ -120,7 +120,6 @@ properties: - description: LCPA memory base, deprecated, use eSRAM pool instead deprecated: true - reg-names: oneOf: - items: diff --git a/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma.yaml b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma.yaml index 11a289f1d505..598903354196 100644 --- a/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma.yaml +++ b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma.yaml @@ -48,7 +48,6 @@ description: | by transfer completion. This must only be used on channels managing transfers for STM32 USART/UART. - maintainers: - Amelie Delaunay <amelie.delaunay@foss.st.com> diff --git a/Documentation/devicetree/bindings/dts-coding-style.rst b/Documentation/devicetree/bindings/dts-coding-style.rst index 202acac0507a..4a02ea60cbbe 100644 --- a/Documentation/devicetree/bindings/dts-coding-style.rst +++ b/Documentation/devicetree/bindings/dts-coding-style.rst @@ -120,7 +120,8 @@ The following order of properties in device nodes is preferred: 4. Standard/common properties (defined by common bindings, e.g. without vendor-prefixes) 5. Vendor-specific properties -6. "status" (if applicable) +6. "status" (if applicable), preceded by a blank line if there is content + before the property 7. Child nodes, where each node is preceded with a blank line The "status" property is by default "okay", thus it can be omitted. @@ -150,6 +151,7 @@ Example:: #address-cells = <1>; #size-cells = <1>; vendor,custom-property = <2>; + status = "disabled"; child_node: child-class@100 { @@ -165,6 +167,7 @@ Example:: vdd-1v8-supply = <&board_vreg4>; vdd-3v3-supply = <&board_vreg2>; vdd-12v-supply = <&board_vreg3>; + status = "okay"; } diff --git a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml index 3d787dea0f14..136e8fccd429 100644 --- a/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml +++ b/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Altera SoCFPGA ECC Manager maintainers: - - Matthew Gerlach <matthew.gerlach@altera.com> + - Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com> description: This binding describes the device tree nodes required for the Altera SoCFPGA diff --git a/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml b/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml index 9afc78254cc0..9637df7af3c8 100644 --- a/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml +++ b/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml @@ -97,7 +97,6 @@ patternProperties: - reg - memory-controller - '^edacpmd@': description: PMD subnode type: object diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml index 00e0f07b44f8..e1599ce10916 100644 --- a/Documentation/devicetree/bindings/eeprom/at25.yaml +++ b/Documentation/devicetree/bindings/eeprom/at25.yaml @@ -25,6 +25,7 @@ properties: oneOf: - items: - enum: + - anvo,anv32c81w - anvo,anv32e61w - atmel,at25256B - fujitsu,mb85rs1mt diff --git a/Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml b/Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml index 3faae3236665..c6fc1d6e25da 100644 --- a/Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml +++ b/Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml @@ -23,7 +23,6 @@ description: | The authoritative guest-side hardware interface documentation to the fw_cfg device can be found in "docs/specs/fw_cfg.txt" in the QEMU source tree. - properties: compatible: const: qemu,fw-cfg-mmio diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.yaml b/Documentation/devicetree/bindings/fpga/fpga-region.yaml index 7d2d3b7aa4b7..4c61461d6247 100644 --- a/Documentation/devicetree/bindings/fpga/fpga-region.yaml +++ b/Documentation/devicetree/bindings/fpga/fpga-region.yaml @@ -18,7 +18,6 @@ description: | - Supported Use Models - Constraints - Introduction ============ @@ -31,7 +30,6 @@ description: | document isn't a replacement for any manufacturers specifications for FPGA usage. - Terminology =========== @@ -108,7 +106,6 @@ description: | a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be reprogrammed independently while the rest of the system continues to function. - Sequence ======== @@ -124,7 +121,6 @@ description: | When the overlay is removed, the child nodes will be removed and the FPGA Region will disable the bridges. - FPGA Region =========== @@ -170,7 +166,6 @@ description: | hardware bridges remain enabled. The PR regions' bridges will be FPGA bridges within the static image of the FPGA. - Supported Use Models ==================== diff --git a/Documentation/devicetree/bindings/fpga/lattice,ice40-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/lattice,ice40-fpga-mgr.yaml new file mode 100644 index 000000000000..5121c6120785 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/lattice,ice40-fpga-mgr.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/lattice,ice40-fpga-mgr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lattice iCE40 FPGA Manager + +maintainers: + - Joel Holdsworth <joel@airwebreathe.org.uk> + +properties: + compatible: + const: lattice,ice40-fpga-mgr + + reg: + maxItems: 1 + + spi-max-frequency: + minimum: 1000000 + maximum: 25000000 + + cdone-gpios: + maxItems: 1 + description: GPIO input connected to CDONE pin + + reset-gpios: + maxItems: 1 + description: + Active-low GPIO output connected to CRESET_B pin. Note that unless the + GPIO is held low during startup, the FPGA will enter Master SPI mode and + drive SCK with a clock signal potentially jamming other devices on the bus + until the firmware is loaded. + +required: + - compatible + - reg + - spi-max-frequency + - cdone-gpios + - reset-gpios + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + fpga@0 { + compatible = "lattice,ice40-fpga-mgr"; + reg = <0>; + spi-max-frequency = <1000000>; + cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + }; + }; diff --git a/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt deleted file mode 100644 index 4dc412437b08..000000000000 --- a/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt +++ /dev/null @@ -1,21 +0,0 @@ -Lattice iCE40 FPGA Manager - -Required properties: -- compatible: Should contain "lattice,ice40-fpga-mgr" -- reg: SPI chip select -- spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000) -- cdone-gpios: GPIO input connected to CDONE pin -- reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note - that unless the GPIO is held low during startup, the - FPGA will enter Master SPI mode and drive SCK with a - clock signal potentially jamming other devices on the - bus until the firmware is loaded. - -Example: - fpga: fpga@0 { - compatible = "lattice,ice40-fpga-mgr"; - reg = <0>; - spi-max-frequency = <1000000>; - cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; - reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; - }; diff --git a/Documentation/devicetree/bindings/gnss/gnss-common.yaml b/Documentation/devicetree/bindings/gnss/gnss-common.yaml index d4430d2d6855..354c0524089c 100644 --- a/Documentation/devicetree/bindings/gnss/gnss-common.yaml +++ b/Documentation/devicetree/bindings/gnss/gnss-common.yaml @@ -31,8 +31,7 @@ properties: maxItems: 1 timepulse-gpios: - description: When a timepulse is provided to the GNSS device using a - GPIO line, this is used. + description: Timepulse signal maxItems: 1 additionalProperties: true diff --git a/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml b/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml index c0c2bfaa606f..b349b7bc0412 100644 --- a/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml +++ b/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/gnss/u-blox,neo-6m.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: U-blox GNSS Receiver +title: u-blox GNSS receiver allOf: - $ref: gnss-common.yaml# @@ -14,7 +14,7 @@ maintainers: - Johan Hovold <johan@kernel.org> description: > - The U-blox GNSS receivers can use UART, DDC (I2C), SPI and USB interfaces. + The u-blox GNSS receivers can use UART, DDC (I2C), SPI and USB interfaces. properties: compatible: @@ -36,6 +36,9 @@ properties: reset-gpios: maxItems: 1 + safeboot-gpios: + maxItems: 1 + vcc-supply: description: > Main voltage regulator @@ -64,6 +67,7 @@ examples: compatible = "u-blox,neo-8"; v-bckp-supply = <&gnss_v_bckp_reg>; vcc-supply = <&gnss_vcc_reg>; - reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio 1 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + safeboot-gpios = <&gpio 2 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; }; }; diff --git a/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml index c213cb9ddb9f..5cfefbbea6ca 100644 --- a/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml @@ -66,5 +66,4 @@ examples: interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; }; - ... diff --git a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml index ab35bcf98101..23410aeca300 100644 --- a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml +++ b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml @@ -22,7 +22,6 @@ description: | ___ ________ chip select# |___________________| - maintainers: - Maxime Ripard <mripard@kernel.org> diff --git a/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml b/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml index aaf97124803f..fed1b06495ad 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml @@ -28,6 +28,7 @@ properties: '#address-cells': const: 1 + '#size-cells': const: 0 @@ -35,7 +36,7 @@ properties: maxItems: 1 patternProperties: - "^(?!gpio@)[^@]+@[0-9]+$": + '^(?!gpio@)[^@]+@[0-9]+$': type: object properties: fsl,pinmux-ids: @@ -93,7 +94,7 @@ patternProperties: additionalProperties: false - "^gpio@[0-9]+$": + '^gpio@[0-9]+$': type: object properties: compatible: @@ -110,10 +111,10 @@ patternProperties: interrupt-controller: true - "#interrupt-cells": + '#interrupt-cells': const: 2 - "#gpio-cells": + '#gpio-cells': const: 2 gpio-controller: true @@ -123,8 +124,8 @@ patternProperties: - reg - interrupts - interrupt-controller - - "#interrupt-cells" - - "#gpio-cells" + - '#interrupt-cells' + - '#gpio-cells' - gpio-controller additionalProperties: false diff --git a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml index d78da7dd2a56..184432d24ea1 100644 --- a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml @@ -11,7 +11,10 @@ maintainers: properties: compatible: - items: + oneOf: + - items: + - const: microchip,pic64gx-gpio + - const: microchip,mpfs-gpio - enum: - microchip,mpfs-gpio - microchip,coregpio-rtl-v3 diff --git a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml index ab2afc0e4153..bba6f5b6606f 100644 --- a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml @@ -111,8 +111,8 @@ additionalProperties: false required: - compatible - reg - - "#address-cells" - - "#size-cells" + - '#address-cells' + - '#size-cells' examples: - | diff --git a/Documentation/devicetree/bindings/gpio/trivial-gpio.yaml b/Documentation/devicetree/bindings/gpio/trivial-gpio.yaml index c994177de940..3f4bbd57fc52 100644 --- a/Documentation/devicetree/bindings/gpio/trivial-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/trivial-gpio.yaml @@ -22,6 +22,8 @@ properties: - cznic,moxtet-gpio - dlg,slg7xl45106 - fcs,fxl6408 + - fsl,ls1046aqds-fpga-gpio-stat-pres2 + - fsl,lx2160ardb-fpga-gpio-sfp - gateworks,pld-gpio - ibm,ppc4xx-gpio - loongson,ls1x-gpio diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index be198182dbfe..db49b8ff8c74 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -22,6 +22,7 @@ properties: - mediatek,mt8183-mali - mediatek,mt8183b-mali - mediatek,mt8186-mali + - mediatek,mt8365-mali - realtek,rtd1619-mali - renesas,r9a07g044-mali - renesas,r9a07g054-mali diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml index a5b4e0021758..bee9faf1d3f8 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml @@ -18,6 +18,8 @@ properties: oneOf: - items: - enum: + - mediatek,mt8196-mali + - nxp,imx95-mali # G310 - rockchip,rk3588-mali - const: arm,mali-valhall-csf # Mali Valhall GPU model/revision is fully discoverable @@ -44,7 +46,9 @@ properties: minItems: 1 items: - const: core - - const: coregroup + - enum: + - coregroup + - stacks - const: stacks mali-supply: true @@ -91,7 +95,6 @@ required: - interrupts - interrupt-names - clocks - - mali-supply additionalProperties: false @@ -108,6 +111,29 @@ allOf: power-domains: maxItems: 1 power-domain-names: false + required: + - mali-supply + - if: + properties: + compatible: + contains: + const: mediatek,mt8196-mali + then: + properties: + mali-supply: false + sram-supply: false + operating-points-v2: false + power-domains: + maxItems: 1 + power-domain-names: false + clocks: + maxItems: 2 + clock-names: + items: + - const: core + - const: stacks + required: + - power-domains examples: - | @@ -143,5 +169,17 @@ examples: }; }; }; + - | + gpu@48000000 { + compatible = "mediatek,mt8196-mali", "arm,mali-valhall-csf"; + reg = <0x48000000 0x480000>; + clocks = <&gpufreq 0>, <&gpufreq 1>; + clock-names = "core", "stacks"; + interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "job", "mmu", "gpu"; + power-domains = <&gpufreq>; + }; ... diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index c87d7bece0ec..225a6e1b7fcd 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -15,6 +15,16 @@ properties: oneOf: - items: - enum: + - renesas,r8a7796-gpu + - renesas,r8a77961-gpu + - const: img,img-gx6250 + - const: img,img-rogue + - items: + - const: renesas,r8a77965-gpu + - const: img,img-ge7800 + - const: img,img-rogue + - items: + - enum: - ti,am62-gpu - const: img,img-axe-1-16m # This deprecated element must be kept around to allow old kernels to @@ -86,48 +96,56 @@ allOf: properties: compatible: contains: - const: img,img-axe-1-16m + enum: + - ti,am62-gpu + - ti,j721s2-gpu then: properties: - power-domains: - items: - - description: Power domain A - power-domain-names: + clocks: maxItems: 1 - required: - - power-domains - - power-domain-names - if: properties: compatible: contains: - const: thead,th1520-gpu + enum: + - img,img-ge7800 + - img,img-gx6250 + - thead,th1520-gpu then: properties: clocks: minItems: 3 clock-names: minItems: 3 + + - if: + properties: + compatible: + contains: + const: img,img-axe-1-16m + then: + properties: power-domains: - items: - - description: The single, unified power domain for the GPU on the - TH1520 SoC, integrating all internal IP power domains. - power-domain-names: false + maxItems: 1 + power-domain-names: + maxItems: 1 required: - power-domains + - power-domain-names - if: properties: compatible: contains: - const: img,img-bxs-4-64 + enum: + - img,img-bxs-4-64 + - img,img-ge7800 + - img,img-gx6250 then: properties: power-domains: - items: - - description: Power domain A - - description: Power domain B + minItems: 2 power-domain-names: minItems: 2 required: @@ -138,13 +156,16 @@ allOf: properties: compatible: contains: - enum: - - ti,am62-gpu - - ti,j721s2-gpu + const: thead,th1520-gpu then: properties: - clocks: - maxItems: 1 + power-domains: + items: + - description: The single, unified power domain for the GPU on the + TH1520 SoC, integrating all internal IP power domains. + power-domain-names: false + required: + - power-domains examples: - | diff --git a/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml b/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml index 152935334c76..3e3f49cf2f52 100644 --- a/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml +++ b/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml @@ -81,7 +81,6 @@ required: - compatible - reg - additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/hwmon/adi,max31827.yaml b/Documentation/devicetree/bindings/hwmon/adi,max31827.yaml index f60e06ab7d0a..c2f7c6ee1a37 100644 --- a/Documentation/devicetree/bindings/hwmon/adi,max31827.yaml +++ b/Documentation/devicetree/bindings/hwmon/adi,max31827.yaml @@ -93,7 +93,6 @@ allOf: adi,fault-q: default: 4 - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/hwmon/apm,xgene-slimpro-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/apm,xgene-slimpro-hwmon.yaml new file mode 100644 index 000000000000..58c51626a9ce --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/apm,xgene-slimpro-hwmon.yaml @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/apm,xgene-slimpro-hwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SLIMpro hwmon + +maintainers: + - Khuong Dinh <khuong@os.amperecomputing.com> + +properties: + compatible: + const: apm,xgene-slimpro-hwmon + + mboxes: + maxItems: 1 + +required: + - compatible + - mboxes + +additionalProperties: false + +examples: + - | + hwmon { + compatible = "apm,xgene-slimpro-hwmon"; + mboxes = <&mailbox 7>; + }; diff --git a/Documentation/devicetree/bindings/hwmon/apm-xgene-hwmon.txt b/Documentation/devicetree/bindings/hwmon/apm-xgene-hwmon.txt deleted file mode 100644 index 59b38557f1bb..000000000000 --- a/Documentation/devicetree/bindings/hwmon/apm-xgene-hwmon.txt +++ /dev/null @@ -1,14 +0,0 @@ -APM X-Gene hwmon driver - -APM X-Gene SOC sensors are accessed over the "SLIMpro" mailbox. - -Required properties : - - compatible : should be "apm,xgene-slimpro-hwmon" - - mboxes : use the label reference for the mailbox as the first parameter. - The second parameter is the channel number. - -Example : - hwmonslimpro { - compatible = "apm,xgene-slimpro-hwmon"; - mboxes = <&mailbox 7>; - }; diff --git a/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml b/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml index 9e5ed901ae54..851fb16ec7fa 100644 --- a/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml +++ b/Documentation/devicetree/bindings/hwmon/aspeed,g6-pwm-tach.yaml @@ -18,8 +18,11 @@ description: | properties: compatible: - enum: - - aspeed,ast2600-pwm-tach + oneOf: + - items: + - const: aspeed,ast2700-pwm-tach + - const: aspeed,ast2600-pwm-tach + - const: aspeed,ast2600-pwm-tach reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/hwmon/max31785.txt b/Documentation/devicetree/bindings/hwmon/max31785.txt deleted file mode 100644 index 106e08c56aaa..000000000000 --- a/Documentation/devicetree/bindings/hwmon/max31785.txt +++ /dev/null @@ -1,22 +0,0 @@ -Bindings for the Maxim MAX31785 Intelligent Fan Controller -========================================================== - -Reference: - -https://datasheets.maximintegrated.com/en/ds/MAX31785.pdf - -The Maxim MAX31785 is a PMBus device providing closed-loop, multi-channel fan -management with temperature and remote voltage sensing. Various fan control -features are provided, including PWM frequency control, temperature hysteresis, -dual tachometer measurements, and fan health monitoring. - -Required properties: -- compatible : One of "maxim,max31785" or "maxim,max31785a" -- reg : I2C address, one of 0x52, 0x53, 0x54, 0x55. - -Example: - - fans@52 { - compatible = "maxim,max31785"; - reg = <0x52>; - }; diff --git a/Documentation/devicetree/bindings/hwmon/maxim,max31790.yaml b/Documentation/devicetree/bindings/hwmon/maxim,max31790.yaml index b1ff496f87f9..558cbd251b0f 100644 --- a/Documentation/devicetree/bindings/hwmon/maxim,max31790.yaml +++ b/Documentation/devicetree/bindings/hwmon/maxim,max31790.yaml @@ -20,7 +20,11 @@ description: > properties: compatible: - const: maxim,max31790 + enum: + - maxim,max31785 + - maxim,max31785a + - maxim,max31785b + - maxim,max31790 reg: maxItems: 1 @@ -31,11 +35,17 @@ properties: resets: maxItems: 1 + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + "#pwm-cells": const: 1 patternProperties: - "^fan-[0-9]+$": + "^fan@[0-9]+$": $ref: fan-common.yaml# unevaluatedProperties: false @@ -56,13 +66,17 @@ examples: reg = <0x20>; clocks = <&sys_clk>; resets = <&reset 0>; + #address-cells = <1>; #pwm-cells = <1>; + #size-cells = <0>; - fan-0 { + fan@0 { + reg = <0x0>; pwms = <&pwm_provider 1>; }; - fan-1 { + fan@1 { + reg = <0x1>; pwms = <&pwm_provider 2>; }; }; diff --git a/Documentation/devicetree/bindings/hwmon/national,lm90.yaml b/Documentation/devicetree/bindings/hwmon/national,lm90.yaml index 1b871f166e79..164068ba069d 100644 --- a/Documentation/devicetree/bindings/hwmon/national,lm90.yaml +++ b/Documentation/devicetree/bindings/hwmon/national,lm90.yaml @@ -45,7 +45,6 @@ properties: - ti,tmp461 - winbond,w83l771 - interrupts: items: - description: | diff --git a/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml b/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml index b8e500e6cd9f..dc8bc4c6df34 100644 --- a/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml +++ b/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml @@ -75,6 +75,7 @@ properties: - const: murata,ncp15wl333 - const: murata,ncp03wf104 - const: murata,ncp15xh103 + - const: murata,ncp18wm474 - const: samsung,1404-001221 # Deprecated "ntc," compatible strings - const: ntc,ncp15wb473 diff --git a/Documentation/devicetree/bindings/hwmon/pmbus/adi,max17616.yaml b/Documentation/devicetree/bindings/hwmon/pmbus/adi,max17616.yaml new file mode 100644 index 000000000000..fa48af81e083 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/pmbus/adi,max17616.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/pmbus/adi,max17616.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices MAX17616/MAX17616A Current-Limiter with PMBus Interface + +maintainers: + - Kim Seer Paller <kimseer.paller@analog.com> + +description: | + The MAX17616/MAX17616A is a 3V to 80V, 7A current-limiter with overvoltage, + surge, undervoltage, reverse polarity, and loss of ground protection. It allows + monitoring of input/output voltage, output current and temperature through the + PMBus serial interface. + Datasheet: + https://www.analog.com/en/products/max17616.html + +properties: + compatible: + const: adi,max17616 + + reg: + maxItems: 1 + + vcc-supply: true + + interrupts: + description: Fault condition signal provided on SMBALERT pin. + maxItems: 1 + +required: + - compatible + - reg + - vcc-supply + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + hwmon@16 { + compatible = "adi,max17616"; + reg = <0x16>; + vcc-supply = <&vcc>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/hwmon/st,tsc1641.yaml b/Documentation/devicetree/bindings/hwmon/st,tsc1641.yaml new file mode 100644 index 000000000000..aaf244790663 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/st,tsc1641.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/st,tsc1641.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ST Microelectronics TSC1641 I2C power monitor + +maintainers: + - Igor Reznichenko <igor@reznichenko.net> + +description: | + TSC1641 is a 60 V, 16-bit high-precision power monitor with I2C and + MIPI I3C interface + + Datasheets: + https://www.st.com/resource/en/datasheet/tsc1641.pdf + +properties: + compatible: + const: st,tsc1641 + + reg: + maxItems: 1 + + interrupts: + description: Optional alert interrupt. + maxItems: 1 + + shunt-resistor-micro-ohms: + description: Shunt resistor value in micro-ohms. Since device has internal + 16-bit RSHUNT register with 10 uOhm LSB, the maximum value is capped at + 655.35 mOhm. + minimum: 100 + default: 1000 + maximum: 655350 + + st,alert-polarity-active-high: + $ref: /schemas/types.yaml#/definitions/flag + description: Default value is 0 which configures the normal polarity of the + ALERT pin, being active low open-drain. Setting this to 1 configures the + polarity of the ALERT pin to be inverted and active high open-drain. + Specify this property to set the alert polarity to active-high. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + power-sensor@40 { + compatible = "st,tsc1641"; + reg = <0x40>; + shunt-resistor-micro-ohms = <1000>; + st,alert-polarity-active-high; + }; + }; diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml index cba5b4a1b81f..0fe6ea190f60 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml @@ -20,7 +20,6 @@ description: | https://www.ti.com/lit/gpn/tmp513 https://www.ti.com/lit/gpn/tmp512 - properties: compatible: enum: diff --git a/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml b/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml index ee7de53e1918..d57e4bf8f65f 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml @@ -15,7 +15,6 @@ description: | Datasheets: https://www.ti.com/lit/gpn/tps23861 - properties: compatible: enum: diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml b/Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml index b6af924dee2e..d8610daa10cd 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml @@ -27,7 +27,6 @@ description: |+ | '------' | | dev | | dev | | dev | '------------' '-----' '-----' '-----' - allOf: - $ref: /schemas/i2c/i2c-mux.yaml# diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml index 758d8f6321e1..06a04db3eda2 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml @@ -9,7 +9,7 @@ title: Qualcomm Universal Peripheral (QUP) I2C controller maintainers: - Andy Gross <agross@kernel.org> - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> allOf: - $ref: /schemas/i2c/i2c-controller.yaml# diff --git a/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml index 17ce39c19ab1..f9a449fee2b0 100644 --- a/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml @@ -64,7 +64,6 @@ patternProperties: required: - reg - allOf: - if: properties: diff --git a/Documentation/devicetree/bindings/i2c/tsd,mule-i2c-mux.yaml b/Documentation/devicetree/bindings/i2c/tsd,mule-i2c-mux.yaml index 28139b676661..19cfffb39296 100644 --- a/Documentation/devicetree/bindings/i2c/tsd,mule-i2c-mux.yaml +++ b/Documentation/devicetree/bindings/i2c/tsd,mule-i2c-mux.yaml @@ -16,7 +16,6 @@ description: | can be selected by writing the appropriate device number to an I2C config register. - +--------------------------------------------------+ | Mule | 0x18| +---------------+ | @@ -34,7 +33,6 @@ description: | | |__/ +--------+ | +--------------------------------------------------+ - allOf: - $ref: /schemas/i2c/i2c-mux.yaml# diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml index 8dae89ecb64d..b91bfb16ed6b 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml @@ -30,7 +30,6 @@ description: | * https://www.analog.com/en/products/adaq4380-4.html * https://www.analog.com/en/products/adaq4381-4.html - $ref: /schemas/spi/spi-peripheral-props.yaml# properties: diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml index 1180d2ffbf84..73c8e9c532f3 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml @@ -166,7 +166,6 @@ properties: An example of backend can be found at http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html - patternProperties: "^channel@[1-8]$": type: object diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml index 9ee4d977c5ed..238a8c9c4143 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml @@ -48,7 +48,6 @@ properties: enum: [2500000, 4096000] default: 4096000 - '#io-channel-cells': const: 1 diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml index bd429552d568..f22eba0250ee 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ade9000.yaml @@ -57,7 +57,6 @@ properties: description: External clock source when not using crystal maxItems: 1 - "#clock-cells": description: ADE9000 can provide clock output via CLKOUT pin with external buffer. diff --git a/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml b/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml index 4e695b97d015..9ea44ce63f25 100644 --- a/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml @@ -36,7 +36,6 @@ properties: "#io-channel-cells": const: 1 - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml index 17bb60e18a1c..c4c4575d3fa9 100644 --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml @@ -456,7 +456,6 @@ patternProperties: items: minimum: 40 - - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml b/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml index 1caa896fce82..de91cb03fdc6 100644 --- a/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml @@ -57,7 +57,6 @@ description: | 4 | batt_dischrg_i 5 | ts_v - properties: compatible: oneOf: diff --git a/Documentation/devicetree/bindings/iio/afe/voltage-divider.yaml b/Documentation/devicetree/bindings/iio/afe/voltage-divider.yaml index 4151f99b42aa..9752d1450064 100644 --- a/Documentation/devicetree/bindings/iio/afe/voltage-divider.yaml +++ b/Documentation/devicetree/bindings/iio/afe/voltage-divider.yaml @@ -29,7 +29,6 @@ description: | | GND - properties: compatible: const: voltage-divider diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml index 64f2352aac3d..ca40359a3944 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml @@ -37,7 +37,6 @@ required: - compatible - reg - allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# diff --git a/Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml b/Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml index c33640ddde58..886f4129c301 100644 --- a/Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml +++ b/Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml @@ -12,7 +12,6 @@ maintainers: description: | Pressure sensor from Murata with SPI and I2C bus interfaces. - properties: compatible: const: murata,zpa2326 diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml index 48f221463166..8fed45ee557b 100644 --- a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml +++ b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml @@ -78,7 +78,6 @@ properties: minItems: 3 maxItems: 3 - semtech,ph01-resolution: $ref: /schemas/types.yaml#/definitions/uint32 enum: [8, 16, 32, 64, 128, 256, 512, 1024] diff --git a/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml b/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml index 312febeeb3bb..a22725f7619b 100644 --- a/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml +++ b/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml @@ -39,7 +39,6 @@ $defs: - reg - adi,sensor-type - properties: compatible: oneOf: @@ -88,7 +87,7 @@ properties: const: 0 patternProperties: - "^thermocouple@": + '^thermocouple@': $ref: '#/$defs/sensor-node' unevaluatedProperties: false @@ -146,7 +145,7 @@ patternProperties: required: - adi,custom-thermocouple - "^diode@": + '^diode@': $ref: '#/$defs/sensor-node' unevaluatedProperties: false @@ -191,7 +190,7 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/uint32 default: 0 - "^rtd@": + '^rtd@': $ref: '#/$defs/sensor-node' unevaluatedProperties: false description: RTD sensor. @@ -280,7 +279,7 @@ patternProperties: type: boolean dependencies: - adi,current-rotate: [ "adi,rsense-share" ] + adi,current-rotate: [ 'adi,rsense-share' ] - if: properties: @@ -290,7 +289,7 @@ patternProperties: required: - adi,custom-rtd - "^thermistor@": + '^thermistor@': $ref: '#/$defs/sensor-node' unevaluatedProperties: false description: Thermistor sensor. @@ -364,7 +363,7 @@ patternProperties: - adi,rsense-handle dependencies: - adi,current-rotate: [ "adi,rsense-share" ] + adi,current-rotate: [ 'adi,rsense-share' ] allOf: - if: @@ -392,7 +391,7 @@ patternProperties: required: - adi,custom-thermistor - "^adc@": + '^adc@': $ref: '#/$defs/sensor-node' unevaluatedProperties: false description: Direct ADC sensor. @@ -407,7 +406,7 @@ patternProperties: description: Whether the sensor is single-ended. type: boolean - "^temp@": + '^temp@': $ref: '#/$defs/sensor-node' unevaluatedProperties: false description: Active analog temperature sensor. @@ -437,7 +436,7 @@ patternProperties: required: - adi,custom-temp - "^rsense@": + '^rsense@': $ref: '#/$defs/sensor-node' unevaluatedProperties: false description: Sense resistor sensor. @@ -476,7 +475,7 @@ allOf: - adi,ltc2984 then: patternProperties: - "^temp@": false + '^temp@': false examples: - | diff --git a/Documentation/devicetree/bindings/input/cypress,cyapa.yaml b/Documentation/devicetree/bindings/input/cypress,cyapa.yaml index 29515151abe9..da629d511da1 100644 --- a/Documentation/devicetree/bindings/input/cypress,cyapa.yaml +++ b/Documentation/devicetree/bindings/input/cypress,cyapa.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Cypress All Points Addressable (APA) I2C Touchpad / Trackpad maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/input/ti,drv266x.yaml b/Documentation/devicetree/bindings/input/ti,drv266x.yaml index da1818824373..1bce389d0e5c 100644 --- a/Documentation/devicetree/bindings/input/ti,drv266x.yaml +++ b/Documentation/devicetree/bindings/input/ti,drv266x.yaml @@ -37,7 +37,6 @@ examples: - | #include <dt-bindings/gpio/gpio.h> - i2c { #address-cells = <1>; #size-cells = <0>; diff --git a/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml b/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml index c593ae63d0ec..12256ae7df90 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: ST-Microelectronics FingerTip touchscreen controller maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: The ST-Microelectronics FingerTip device provides a basic touchscreen diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index 256de140c03d..afa4d3539f5c 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Interconnect Bandwidth Monitor maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: | Bandwidth Monitor measures current throughput on buses between various NoC diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml index dad3ad2fd93b..da16d8e9bdc5 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml @@ -122,7 +122,6 @@ allOf: required: - reg - unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index f3247a47f9ee..bfd30aae682b 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -305,7 +305,6 @@ examples: }; }; - device@0 { reg = <0 4>; interrupts = <1 1 4 &part0>; diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml index 999df5b905c5..258d21fe6e35 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml @@ -54,7 +54,6 @@ properties: | |---... +---------+---module31 - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.yaml index 5fda626c80ce..2ff390c1705b 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.yaml @@ -34,8 +34,6 @@ properties: required: - compatible - reg - - interrupt-controller - - '#interrupt-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml index c49688be1058..5c768c1e159c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml @@ -20,6 +20,7 @@ properties: - fsl,imx8qm-irqsteer - fsl,imx8qxp-irqsteer - fsl,imx94-irqsteer + - fsl,imx95-irqsteer - const: fsl,imx-irqsteer reg: @@ -87,6 +88,7 @@ allOf: - fsl,imx8mp-irqsteer - fsl,imx8qm-irqsteer - fsl,imx8qxp-irqsteer + - fsl,imx95-irqsteer then: required: - power-domains diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,vf610-mscm-ir.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,vf610-mscm-ir.yaml index fdc254f8d013..55b1ae863b91 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,vf610-mscm-ir.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,vf610-mscm-ir.yaml @@ -14,7 +14,6 @@ description: Vybrid SoC's but is only really useful in dual core configurations (VF6xx which comes with a Cortex-A5/Cortex-M4 combination). - maintainers: - Frank Li <Frank.Li@nxp.com> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml index 60441f0c5d72..f63b23f48d8e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml @@ -78,7 +78,6 @@ required: - '#interrupt-cells' - loongson,parent_int_map - unevaluatedProperties: false if: diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml index fdcb4d8db818..20dfffb34f0c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml @@ -18,7 +18,6 @@ description: flush command is executed. With CIRQ, MCUSYS can be completely turned off to improve the system power consumption without losing interrupts. - properties: compatible: items: diff --git a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml index 4ff609faba32..d943ea820cdd 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml @@ -26,7 +26,6 @@ properties: - mscc,ocelot-icpu-intr - mscc,serval-icpu-intr - '#interrupt-cells': const: 1 diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index 6fdb7ae9e85a..e80820cc55a7 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -61,6 +61,7 @@ properties: - anlogic,dr1v90-plic - canaan,k210-plic - eswin,eic7700-plic + - microchip,pic64gx-plic - sifive,fu540-c000-plic - spacemit,k1-plic - starfive,jh7100-plic diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml index 6e3d6e6d9e07..61b30a7732ec 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: TI OMAP4 Wake-up Generator maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: > All TI OMAP4/5 (and their derivatives) are interrupt controllers that route diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 89495f094d52..cdbd23b5c08c 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -35,6 +35,8 @@ properties: - description: Qcom SoCs implementing "qcom,smmu-500" and "arm,mmu-500" items: - enum: + - qcom,glymur-smmu-500 + - qcom,kaanapali-smmu-500 - qcom,milos-smmu-500 - qcom,qcm2290-smmu-500 - qcom,qcs615-smmu-500 @@ -89,6 +91,8 @@ properties: - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500" items: - enum: + - qcom,glymur-smmu-500 + - qcom,kaanapali-smmu-500 - qcom,milos-smmu-500 - qcom,qcm2290-smmu-500 - qcom,qcs615-smmu-500 @@ -638,7 +642,6 @@ examples: <&smmu1 7>; }; - /* SMMU with stream matching */ smmu2: iommu@ba5f0000 { compatible = "arm,smmu-v1"; @@ -664,7 +667,6 @@ examples: iommus = <&smmu2 1 0x30>; }; - /* ARM MMU-500 with 10-bit stream ID input configuration */ smmu3: iommu@ba600000 { compatible = "arm,mmu-500", "arm,smmu-v2"; @@ -685,8 +687,6 @@ examples: /* bus whose child devices emit one unique 10-bit stream ID each, but may master through multiple SMMU TBUs */ iommu-map = <0 &smmu3 0 0x400>; - - }; - |+ diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml index f49ed8ac4776..79c573c47b08 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml @@ -82,6 +82,9 @@ properties: - mediatek,mt8188-iommu-vdo # generation two - mediatek,mt8188-iommu-vpp # generation two - mediatek,mt8188-iommu-infra # generation two + - mediatek,mt8189-iommu-apu # generation two + - mediatek,mt8189-iommu-infra # generation two + - mediatek,mt8189-iommu-mm # generation two - mediatek,mt8192-m4u # generation two - mediatek,mt8195-iommu-vdo # generation two - mediatek,mt8195-iommu-vpp # generation two @@ -128,6 +131,7 @@ properties: This is the mtk_m4u_id according to the HW. Specifies the mtk_m4u_id as defined in dt-binding/memory/mediatek,mt8188-memory-port.h for mt8188, + dt-binding/memory/mediatek,mt8189-memory-port.h for mt8189, dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623, dt-binding/memory/mt2712-larb-port.h for mt2712, dt-binding/memory/mt6779-larb-port.h for mt6779, @@ -164,6 +168,7 @@ allOf: - mediatek,mt8186-iommu-mm - mediatek,mt8188-iommu-vdo - mediatek,mt8188-iommu-vpp + - mediatek,mt8189-iommu-mm - mediatek,mt8192-m4u - mediatek,mt8195-iommu-vdo - mediatek,mt8195-iommu-vpp @@ -180,6 +185,7 @@ allOf: - mediatek,mt8186-iommu-mm - mediatek,mt8188-iommu-vdo - mediatek,mt8188-iommu-vpp + - mediatek,mt8189-iommu-mm - mediatek,mt8192-m4u - mediatek,mt8195-iommu-vdo - mediatek,mt8195-iommu-vpp @@ -208,6 +214,8 @@ allOf: contains: enum: - mediatek,mt8188-iommu-infra + - mediatek,mt8189-iommu-apu + - mediatek,mt8189-iommu-infra - mediatek,mt8195-iommu-infra then: diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml index 3e5623edd207..93a489025317 100644 --- a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml @@ -32,14 +32,18 @@ properties: - const: qcom,msm-iommu-v2 clocks: + minItems: 2 items: - description: Clock required for IOMMU register group access - description: Clock required for underlying bus access + - description: Clock required for Translation Buffer Unit access clock-names: + minItems: 2 items: - const: iface - const: bus + - const: tbu power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/leds/backlight/arc,arc2c0608.yaml b/Documentation/devicetree/bindings/leds/backlight/arc,arc2c0608.yaml new file mode 100644 index 000000000000..786beced5590 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/arc,arc2c0608.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/arc,arc2c0608.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ArcticSand arc2c0608 LED driver + +description: | + The ArcticSand arc2c0608 LED driver provides ultra + efficient notebook backlighting. Optional properties not + specified will default to values in IC EPROM. + + Datasheet: + https://www.murata.com/-/media/webrenewal/products/power/power-semiconductor/overview/lineup/led-boost/arc2/arc2c0608.ashx. + +maintainers: + - Brian Dodge <bdodge@arcticsand.com> + +allOf: + - $ref: /schemas/leds/common.yaml + +properties: + compatible: + const: arc,arc2c0608 + + reg: + maxItems: 1 + + default-brightness: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 4095 + + led-sources: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: List of enabled channels + items: + enum: [0, 1, 2, 3, 4, 5] + minItems: 1 + uniqueItems: true + + arc,led-config-0: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Fading speed (period between intensity + steps) + + arc,led-config-1: + $ref: /schemas/types.yaml#/definitions/uint32 + description: If set, sets ILED_CONFIG register. Used for + fine tuning the maximum LED current. + + arc,dim-freq: + $ref: /schemas/types.yaml#/definitions/uint32 + description: PWM mode frequency setting (bits [3:0] used) + + arc,comp-config: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Setting for register CONFIG_COMP which + controls internal resitances, feed forward freqs, + and initial VOUT at startup. Consult the datasheet. + + arc,filter-config: + $ref: /schemas/types.yaml#/definitions/uint32 + description: RC and PWM Filter settings. + Bit Assignment + 7654 3 2 1 0 + xxxx RCF1 RCF0 PWM1 PWM0 + RCF statuses PWM Filter Statues + 00 = OFF (default) 00 = OFF (default) + 01 = LOW 01 = 2 STEPS + 10 - MEDIUM 10 = 4 STEPS + 11 = HIGH 11 = 8 STEPS + + arc,trim-config: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Sets percentage increase of Maximum LED + Current. + 0x00 = 0% increase. + 0x20 = 20.2%. + 0x3F = 41.5% + + label: true + + linux,default-trigger: true + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@30 { + compatible = "arc,arc2c0608"; + reg = <0x30>; + default-brightness = <500>; + label = "lcd-backlight"; + linux,default-trigger = "backlight"; + led-sources = <0 1 2 5>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/leds/backlight/arcxcnn_bl.txt b/Documentation/devicetree/bindings/leds/backlight/arcxcnn_bl.txt deleted file mode 100644 index 230abdefd6e7..000000000000 --- a/Documentation/devicetree/bindings/leds/backlight/arcxcnn_bl.txt +++ /dev/null @@ -1,33 +0,0 @@ -Binding for ArcticSand arc2c0608 LED driver - -Required properties: -- compatible: should be "arc,arc2c0608" -- reg: slave address - -Optional properties: -- default-brightness: brightness value on boot, value from: 0-4095 -- label: The name of the backlight device - See Documentation/devicetree/bindings/leds/common.txt -- led-sources: List of enabled channels from 0 to 5. - See Documentation/devicetree/bindings/leds/common.txt - -- arc,led-config-0: setting for register ILED_CONFIG_0 -- arc,led-config-1: setting for register ILED_CONFIG_1 -- arc,dim-freq: PWM mode frequence setting (bits [3:0] used) -- arc,comp-config: setting for register CONFIG_COMP -- arc,filter-config: setting for register FILTER_CONFIG -- arc,trim-config: setting for register IMAXTUNE - -Note: Optional properties not specified will default to values in IC EPROM - -Example: - -arc2c0608@30 { - compatible = "arc,arc2c0608"; - reg = <0x30>; - default-brightness = <500>; - label = "lcd-backlight"; - linux,default-trigger = "backlight"; - led-sources = <0 1 2 5>; -}; - diff --git a/Documentation/devicetree/bindings/leds/backlight/awinic,aw99706.yaml b/Documentation/devicetree/bindings/leds/backlight/awinic,aw99706.yaml new file mode 100644 index 000000000000..f48ce7a3434d --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/awinic,aw99706.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/awinic,aw99706.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Awinic AW99706 6-channel WLED Backlight Driver + +maintainers: + - Junjie Cao <caojunjie650@gmail.com> + +allOf: + - $ref: common.yaml# + +properties: + compatible: + const: awinic,aw99706 + + reg: + maxItems: 1 + + enable-gpios: + description: GPIO to use to enable/disable the backlight (HWEN pin). + maxItems: 1 + + awinic,dim-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + Select dimming mode of the device. + 0 = Bypass mode. + 1 = DC mode. + 2 = MIX mode(PWM at low brightness and DC at high brightness). + 3 = MIX-26k mode(MIX mode with different PWM frequency). + enum: [ 0, 1, 2, 3 ] + default: 1 + + awinic,sw-freq-hz: + description: Boost switching frequency in Hz. + enum: [ 300000, 400000, 500000, 600000, 660000, 750000, 850000, 1000000, + 1200000, 1330000, 1500000, 1700000 ] + default: 750000 + + awinic,sw-ilmt-microamp: + description: Switching current limitation in uA. + enum: [ 1500000, 2000000, 2500000, 3000000 ] + default: 3000000 + + awinic,iled-max-microamp: + description: Maximum LED current setting in uA. + minimum: 5000 + maximum: 50000 + multipleOf: 500 + default: 20000 + + awinic,uvlo-thres-microvolt: + description: UVLO(Under Voltage Lock Out) in uV. + enum: [ 2200000, 5000000 ] + default: 2200000 + + awinic,ramp-ctl: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + Select ramp control and filter of the device. + 0 = Fade in/fade out. + 1 = Light filter. + 2 = Medium filter. + 3 = Heavy filter. + enum: [ 0, 1, 2, 3 ] + default: 2 + +required: + - compatible + - reg + - enable-gpios + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + backlight@76 { + compatible = "awinic,aw99706"; + reg = <0x76>; + enable-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>; + default-brightness = <2047>; + max-brightness = <4095>; + awinic,dim-mode = <1>; + awinic,sw-freq-hz = <750000>; + awinic,sw-ilmt-microamp = <3000000>; + awinic,uvlo-thres-microvolt = <2200000>; + awinic,iled-max-microamp = <20000>; + awinic,ramp-ctl = <2>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/leds/common.yaml b/Documentation/devicetree/bindings/leds/common.yaml index 274f83288a92..f4e44b33f56d 100644 --- a/Documentation/devicetree/bindings/leds/common.yaml +++ b/Documentation/devicetree/bindings/leds/common.yaml @@ -173,6 +173,12 @@ properties: led-max-microamp. $ref: /schemas/types.yaml#/definitions/uint32 + default-brightness: + description: + Brightness to be set if LED's default state is on. Used only during + initialization. If the option is not set then max brightness is used. + $ref: /schemas/types.yaml#/definitions/uint32 + panic-indicator: description: This property specifies that the LED should be used, if at all possible, diff --git a/Documentation/devicetree/bindings/leds/leds-pwm.yaml b/Documentation/devicetree/bindings/leds/leds-pwm.yaml index 61b97e8bc36d..6c4fcefbe25f 100644 --- a/Documentation/devicetree/bindings/leds/leds-pwm.yaml +++ b/Documentation/devicetree/bindings/leds/leds-pwm.yaml @@ -40,6 +40,13 @@ patternProperties: initialization. If the option is not set then max brightness is used. $ref: /schemas/types.yaml#/definitions/uint32 + enable-gpios: + description: + GPIO for LED hardware enable control. Set active when brightness is + non-zero and inactive when brightness is zero. + The GPIO default state follows the "default-state" property. + maxItems: 1 + required: - pwms - max-brightness diff --git a/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml b/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml index 841a0229c472..c4b7e57b2518 100644 --- a/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml +++ b/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml @@ -13,6 +13,11 @@ description: > The Qualcomm Light Pulse Generator consists of three different hardware blocks; a ramp generator with lookup table (LUT), the light pulse generator and a three channel current sink. These blocks are found in a wide range of Qualcomm PMICs. + The light pulse generator (LPG) can also be used independently to output PWM + signal for standard PWM applications. In this scenario, the LPG output should + be routed to a specific PMIC GPIO by setting the GPIO pin mux to the special + functions indicated in the datasheet, the TRILED driver for the channel will + not be enabled in this configuration. properties: compatible: diff --git a/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml b/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml index fa03e73622d4..b409b2a8b5c5 100644 --- a/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml +++ b/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm PM8058 PMIC LED maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: | The Qualcomm PM8058 contains an LED block for up to six LEDs:: three normal diff --git a/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml b/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml index bcf0ad4ea57e..05250aefd385 100644 --- a/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml +++ b/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml @@ -24,6 +24,7 @@ properties: - enum: - qcom,pm6150l-flash-led - qcom,pm660l-flash-led + - qcom,pm7550-flash-led - qcom,pm8150c-flash-led - qcom,pm8150l-flash-led - qcom,pm8350c-flash-led diff --git a/Documentation/devicetree/bindings/mailbox/apm,xgene-slimpro-mbox.yaml b/Documentation/devicetree/bindings/mailbox/apm,xgene-slimpro-mbox.yaml new file mode 100644 index 000000000000..815f08d61de8 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/apm,xgene-slimpro-mbox.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/apm,xgene-slimpro-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: APM X-Gene SLIMpro mailbox + +maintainers: + - Khuong Dinh <khuong@os.amperecomputing.com> + +description: + The APM X-Gene SLIMpro mailbox is used to communicate messages between + the ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple + interrupt based door bell mechanism and can exchange simple messages using the + internal registers. + +properties: + compatible: + const: apm,xgene-slimpro-mbox + + reg: + maxItems: 1 + + interrupts: + items: + - description: mailbox channel 0 doorbell + - description: mailbox channel 1 doorbell + - description: mailbox channel 2 doorbell + - description: mailbox channel 3 doorbell + - description: mailbox channel 4 doorbell + - description: mailbox channel 5 doorbell + - description: mailbox channel 6 doorbell + - description: mailbox channel 7 doorbell + + '#mbox-cells': + description: Number of mailbox channel. + const: 1 + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + mailbox@10540000 { + compatible = "apm,xgene-slimpro-mbox"; + reg = <0x10540000 0xa000>; + #mbox-cells = <1>; + interrupts = <0x0 0x0 0x4>, + <0x0 0x1 0x4>, + <0x0 0x2 0x4>, + <0x0 0x3 0x4>, + <0x0 0x4 0x4>, + <0x0 0x5 0x4>, + <0x0 0x6 0x4>, + <0x0 0x7 0x4>; + }; diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml index d9a4f4a02d7c..e45b661e8b41 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml @@ -52,7 +52,6 @@ properties: - const: arm,mhu-doorbell - const: arm,primecell - reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml index 02f06314d85f..3828d77f6316 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml @@ -127,7 +127,6 @@ properties: - minimum: 0 maximum: 124 - '#mbox-cells': description: | It is always set to 2. The first argument in the consumers 'mboxes' diff --git a/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml index 8a1369df4ecb..4ca0d5e49c79 100644 --- a/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml @@ -26,7 +26,6 @@ properties: - mediatek,mt8188-adsp-mbox - const: mediatek,mt8186-adsp-mbox - "#mbox-cells": const: 0 diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 615ed103b7e6..f40dc9048327 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -187,10 +187,10 @@ allOf: enum: - qcom,msm8916-apcs-kpss-global then: - $ref: "#/$defs/msm8916-apcs-clock-controller" + $ref: '#/$defs/msm8916-apcs-clock-controller' properties: clock-controller: - $ref: "#/$defs/msm8916-apcs-clock-controller" + $ref: '#/$defs/msm8916-apcs-clock-controller' - if: properties: @@ -199,10 +199,10 @@ allOf: enum: - qcom,msm8939-apcs-kpss-global then: - $ref: "#/$defs/msm8939-apcs-clock-controller" + $ref: '#/$defs/msm8939-apcs-clock-controller' properties: clock-controller: - $ref: "#/$defs/msm8939-apcs-clock-controller" + $ref: '#/$defs/msm8939-apcs-clock-controller' - if: properties: @@ -211,10 +211,10 @@ allOf: enum: - qcom,sdx55-apcs-gcc then: - $ref: "#/$defs/sdx55-apcs-clock-controller" + $ref: '#/$defs/sdx55-apcs-clock-controller' properties: clock-controller: - $ref: "#/$defs/sdx55-apcs-clock-controller" + $ref: '#/$defs/sdx55-apcs-clock-controller' - if: properties: @@ -223,10 +223,10 @@ allOf: enum: - qcom,ipq6018-apcs-apps-global then: - $ref: "#/$defs/ipq6018-apcs-clock-controller" + $ref: '#/$defs/ipq6018-apcs-clock-controller' properties: clock-controller: - $ref: "#/$defs/ipq6018-apcs-clock-controller" + $ref: '#/$defs/ipq6018-apcs-clock-controller' - if: properties: diff --git a/Documentation/devicetree/bindings/mailbox/xgene-slimpro-mailbox.txt b/Documentation/devicetree/bindings/mailbox/xgene-slimpro-mailbox.txt deleted file mode 100644 index e46451bb242f..000000000000 --- a/Documentation/devicetree/bindings/mailbox/xgene-slimpro-mailbox.txt +++ /dev/null @@ -1,35 +0,0 @@ -The APM X-Gene SLIMpro mailbox is used to communicate messages between -the ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple -interrupt based door bell mechanism and can exchange simple messages using the -internal registers. - -There are total of 8 interrupts in this mailbox. Each used for an individual -door bell (or mailbox channel). - -Required properties: -- compatible: Should be as "apm,xgene-slimpro-mbox". - -- reg: Contains the mailbox register address range. - -- interrupts: 8 interrupts must be from 0 to 7, interrupt 0 define the - the interrupt for mailbox channel 0 and interrupt 1 for - mailbox channel 1 and so likewise for the reminder. - -- #mbox-cells: only one to specify the mailbox channel number. - -Example: - -Mailbox Node: - mailbox: mailbox@10540000 { - compatible = "apm,xgene-slimpro-mbox"; - reg = <0x0 0x10540000 0x0 0xa000>; - #mbox-cells = <1>; - interrupts = <0x0 0x0 0x4>, - <0x0 0x1 0x4>, - <0x0 0x2 0x4>, - <0x0 0x3 0x4>, - <0x0 0x4 0x4>, - <0x0 0x5 0x4>, - <0x0 0x6 0x4>, - <0x0 0x7 0x4>, - }; diff --git a/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml index fe83b5cb1278..04d6473d666f 100644 --- a/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml @@ -142,7 +142,7 @@ patternProperties: - compatible - reg - reg-names - - "#mbox-cells" + - '#mbox-cells' - xlnx,ipi-id required: diff --git a/Documentation/devicetree/bindings/media/amphion,vpu.yaml b/Documentation/devicetree/bindings/media/amphion,vpu.yaml index 5a920d9e78c7..fa18013d705d 100644 --- a/Documentation/devicetree/bindings/media/amphion,vpu.yaml +++ b/Documentation/devicetree/bindings/media/amphion,vpu.yaml @@ -45,7 +45,6 @@ patternProperties: between driver and firmware. Implement via mailbox on driver. $ref: /schemas/mailbox/fsl,mu.yaml# - "^vpu-core@[0-9a-f]+$": description: Each core correspond a decoder or encoder, need to configure them diff --git a/Documentation/devicetree/bindings/media/fsl,imx6q-vdoa.yaml b/Documentation/devicetree/bindings/media/fsl,imx6q-vdoa.yaml index 511ac0d67a7f..988a5b3a62bd 100644 --- a/Documentation/devicetree/bindings/media/fsl,imx6q-vdoa.yaml +++ b/Documentation/devicetree/bindings/media/fsl,imx6q-vdoa.yaml @@ -16,7 +16,7 @@ maintainers: properties: compatible: - const: "fsl,imx6q-vdoa" + const: fsl,imx6q-vdoa reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml b/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml index 2dc2829d42a0..f8d9889dbc21 100644 --- a/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml +++ b/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml @@ -154,7 +154,5 @@ examples: }; }; }; - - }; }; diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml index ebd95a8d9b2f..4cb0f5aa1301 100644 --- a/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml +++ b/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml index e563e35920c4..9df1e0f872f2 100644 --- a/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml +++ b/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung S5K6A3(YX) raw image sensor maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: S5K6A3(YX) is a raw image sensor with MIPI CSI-2 and CCP2 image data diff --git a/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml b/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml index c9673391afdb..0592d0b9af92 100644 --- a/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml +++ b/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml @@ -70,7 +70,6 @@ properties: $ref: /schemas/graph.yaml#/properties/port description: Video port for the decoder output. - required: - port@0 - port@1 diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8173-mdp.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8173-mdp.yaml new file mode 100644 index 000000000000..8ca33a733c47 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mt8173-mdp.yaml @@ -0,0 +1,169 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mt8173-mdp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8173 Media Data Path + +maintainers: + - Ariel D'Alessandro <ariel.dalessandro@collabora.com> + +description: + Media Data Path is used for scaling and color space conversion. + +properties: + compatible: + oneOf: + - enum: + - mediatek,mt8173-mdp-rdma + - mediatek,mt8173-mdp-rsz + - mediatek,mt8173-mdp-wdma + - mediatek,mt8173-mdp-wrot + - items: + - const: mediatek,mt8173-mdp-rdma + - const: mediatek,mt8173-mdp + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + + power-domains: + maxItems: 1 + + iommus: + maxItems: 1 + + mediatek,vpu: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to Mediatek Video Processor Unit for HW Codec encode/decode and + image processing. + +required: + - compatible + - reg + - clocks + - power-domains + +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8173-mdp-rdma + then: + properties: + clocks: + items: + - description: Main clock + - description: Mutex clock + else: + properties: + clocks: + items: + - description: Main clock + + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8173-mdp-rdma + - mediatek,mt8173-mdp-wdma + - mediatek,mt8173-mdp-wrot + then: + required: + - iommus + + - if: + properties: + compatible: + contains: + const: mediatek,mt8173-mdp + then: + required: + - mediatek,vpu + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8173-clk.h> + #include <dt-bindings/memory/mt8173-larb-port.h> + #include <dt-bindings/power/mt8173-power.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + mdp_rdma0: rdma@14001000 { + compatible = "mediatek,mt8173-mdp-rdma", + "mediatek,mt8173-mdp"; + reg = <0 0x14001000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MUTEX_32K>; + power-domains = <&spm MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_RDMA0>; + mediatek,vpu = <&vpu>; + }; + + mdp_rdma1: rdma@14002000 { + compatible = "mediatek,mt8173-mdp-rdma"; + reg = <0 0x14002000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RDMA1>, + <&mmsys CLK_MM_MUTEX_32K>; + power-domains = <&spm MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_RDMA1>; + }; + + mdp_rsz0: rsz@14003000 { + compatible = "mediatek,mt8173-mdp-rsz"; + reg = <0 0x14003000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ0>; + power-domains = <&spm MT8173_POWER_DOMAIN_MM>; + }; + + mdp_rsz1: rsz@14004000 { + compatible = "mediatek,mt8173-mdp-rsz"; + reg = <0 0x14004000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ1>; + power-domains = <&spm MT8173_POWER_DOMAIN_MM>; + }; + + mdp_rsz2: rsz@14005000 { + compatible = "mediatek,mt8173-mdp-rsz"; + reg = <0 0x14005000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ2>; + power-domains = <&spm MT8173_POWER_DOMAIN_MM>; + }; + + mdp_wdma0: wdma@14006000 { + compatible = "mediatek,mt8173-mdp-wdma"; + reg = <0 0x14006000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WDMA>; + power-domains = <&spm MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_WDMA>; + }; + + mdp_wrot0: wrot@14007000 { + compatible = "mediatek,mt8173-mdp-wrot"; + reg = <0 0x14007000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + power-domains = <&spm MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_WROT0>; + }; + + mdp_wrot1: wrot@14008000 { + compatible = "mediatek,mt8173-mdp-wrot"; + reg = <0 0x14008000 0 0x1000>; + clocks = <&mmsys CLK_MM_MDP_WROT1>; + power-domains = <&spm MT8173_POWER_DOMAIN_MM>; + iommus = <&iommu M4U_PORT_MDP_WROT1>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/media/mediatek-mdp.txt b/Documentation/devicetree/bindings/media/mediatek-mdp.txt deleted file mode 100644 index 253a93eabb5e..000000000000 --- a/Documentation/devicetree/bindings/media/mediatek-mdp.txt +++ /dev/null @@ -1,96 +0,0 @@ -* Mediatek Media Data Path - -Media Data Path is used for scaling and color space conversion. - -Required properties (controller node): -- compatible: "mediatek,mt8173-mdp" -- mediatek,vpu: the node of video processor unit, see - Documentation/devicetree/bindings/media/mediatek,mt8173-vpu.yaml for - details. - -Required properties (all function blocks, child node): -- compatible: Should be one of - "mediatek,mt8173-mdp-rdma" - read DMA - "mediatek,mt8173-mdp-rsz" - resizer - "mediatek,mt8173-mdp-wdma" - write DMA - "mediatek,mt8173-mdp-wrot" - write DMA with rotation -- reg: Physical base address and length of the function block register space -- clocks: device clocks, see - Documentation/devicetree/bindings/clock/clock-bindings.txt for details. -- power-domains: a phandle to the power domain, see - Documentation/devicetree/bindings/power/power_domain.txt for details. - -Required properties (DMA function blocks, child node): -- compatible: Should be one of - "mediatek,mt8173-mdp-rdma" - "mediatek,mt8173-mdp-wdma" - "mediatek,mt8173-mdp-wrot" -- iommus: should point to the respective IOMMU block with master port as - argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml - for details. - -Example: - mdp_rdma0: rdma@14001000 { - compatible = "mediatek,mt8173-mdp-rdma"; - "mediatek,mt8173-mdp"; - reg = <0 0x14001000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RDMA0>, - <&mmsys CLK_MM_MUTEX_32K>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_RDMA0>; - mediatek,vpu = <&vpu>; - }; - - mdp_rdma1: rdma@14002000 { - compatible = "mediatek,mt8173-mdp-rdma"; - reg = <0 0x14002000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RDMA1>, - <&mmsys CLK_MM_MUTEX_32K>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_RDMA1>; - }; - - mdp_rsz0: rsz@14003000 { - compatible = "mediatek,mt8173-mdp-rsz"; - reg = <0 0x14003000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RSZ0>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - }; - - mdp_rsz1: rsz@14004000 { - compatible = "mediatek,mt8173-mdp-rsz"; - reg = <0 0x14004000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RSZ1>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - }; - - mdp_rsz2: rsz@14005000 { - compatible = "mediatek,mt8173-mdp-rsz"; - reg = <0 0x14005000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_RSZ2>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - }; - - mdp_wdma0: wdma@14006000 { - compatible = "mediatek,mt8173-mdp-wdma"; - reg = <0 0x14006000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_WDMA>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_WDMA>; - }; - - mdp_wrot0: wrot@14007000 { - compatible = "mediatek,mt8173-mdp-wrot"; - reg = <0 0x14007000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_WROT0>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_WROT0>; - }; - - mdp_wrot1: wrot@14008000 { - compatible = "mediatek,mt8173-mdp-wrot"; - reg = <0 0x14008000 0 0x1000>; - clocks = <&mmsys CLK_MM_MDP_WROT1>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; - iommus = <&iommu M4U_PORT_MDP_WROT1>; - }; diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml index 4cba42ba7cf7..b5aca3d2cc5c 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml @@ -79,7 +79,6 @@ allOf: power-domains: minItems: 2 # Wrapper and 1 slot - additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml index d195f1bfb23d..c99fe4106eee 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml @@ -484,7 +484,6 @@ examples: "gcc_axi_hf", "gcc_axi_sf"; - iommus = <&apps_smmu 0x2000 0x4e0>, <&apps_smmu 0x2020 0x4e0>, <&apps_smmu 0x2040 0x4e0>, diff --git a/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml index c9a0fcafe53f..c42d3470bdac 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SM8750 SoC Iris video encoder and decoder maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: The Iris video processing unit on Qualcomm SM8750 SoC is a video encode and diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml index dd6cc7ac1f7c..2ddca4167b0b 100644 --- a/Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml +++ b/Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Sylwester Nawrocki <s.nawrocki@samsung.com> properties: diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml index 2ba27b230559..17ece4eb300c 100644 --- a/Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml +++ b/Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung S5P/Exynos SoC Fully Integrated Mobile Camera maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Sylwester Nawrocki <s.nawrocki@samsung.com> description: diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml index 71d63bb9abb5..c8894358c46c 100644 --- a/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml +++ b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung Exynos4212/4412 SoC Imaging Subsystem (FIMC-IS) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Sylwester Nawrocki <s.nawrocki@samsung.com> description: @@ -111,7 +111,6 @@ patternProperties: reg: maxItems: 1 - clocks: maxItems: 1 diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml index f80eca0a4f41..bda724897293 100644 --- a/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml +++ b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung Exynos SoC series camera host interface (FIMC-LITE) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Sylwester Nawrocki <s.nawrocki@samsung.com> description: diff --git a/Documentation/devicetree/bindings/media/samsung,fimc.yaml b/Documentation/devicetree/bindings/media/samsung,fimc.yaml index 2a54379d9509..1bfba84f8854 100644 --- a/Documentation/devicetree/bindings/media/samsung,fimc.yaml +++ b/Documentation/devicetree/bindings/media/samsung,fimc.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung S5P/Exynos SoC Camera Subsystem (FIMC) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Sylwester Nawrocki <s.nawrocki@samsung.com> description: | diff --git a/Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml b/Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml index 1b75390fdaac..1af5d7ac382c 100644 --- a/Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml +++ b/Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung S5C73M3 8Mp camera ISP maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Sylwester Nawrocki <s.nawrocki@samsung.com> description: diff --git a/Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml b/Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml index e28d6ec56c0b..5c969e764d4f 100644 --- a/Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml +++ b/Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml @@ -42,7 +42,6 @@ properties: reg: maxItems: 1 - required: - compatible - clocks diff --git a/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml b/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml index 4afa4a24b868..b9f7d84f38c2 100644 --- a/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml +++ b/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml @@ -21,7 +21,6 @@ description: format and copy the result into a part or the whole of a destination image with a different color format. (TODO) - maintainers: - Dillon Min <dillon.minfei@gmail.com> diff --git a/Documentation/devicetree/bindings/media/video-interface-devices.yaml b/Documentation/devicetree/bindings/media/video-interface-devices.yaml index 3ad1590b0496..a81d2a155fe6 100644 --- a/Documentation/devicetree/bindings/media/video-interface-devices.yaml +++ b/Documentation/devicetree/bindings/media/video-interface-devices.yaml @@ -128,7 +128,6 @@ properties: 0 degrees camera rotation: - Y-Rp ^ Y-Rc ! @@ -145,7 +144,6 @@ properties: 0 +-------------------------------------> 0 X-Rc - X-Rc 0 <------------------------------------+ 0 X-Rp 0 ! @@ -228,7 +226,6 @@ properties: V X-Rc - Example one - Webcam A camera module installed on the user facing part of a laptop screen @@ -273,7 +270,6 @@ properties: optical inversion, the two reference systems will not be aligned, with 'Rp' being rotated 180 degrees relatively to 'Rc': - X-Rc 0 <------------------------------------+ 0 ! diff --git a/Documentation/devicetree/bindings/memory-controllers/qcom,ebi2-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/qcom,ebi2-peripheral-props.yaml index 29f8c30e8a88..aec88cd2df76 100644 --- a/Documentation/devicetree/bindings/memory-controllers/qcom,ebi2-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/qcom,ebi2-peripheral-props.yaml @@ -62,7 +62,6 @@ properties: minimum: 0 maximum: 15 - # FAST chip selects qcom,xmem-address-hold-enable: $ref: /schemas/types.yaml#/definitions/uint32 diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml index f329223cec07..cbc3a2485a2f 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml @@ -48,16 +48,16 @@ properties: reg: maxItems: 1 - "#address-cells": + '#address-cells': const: 1 - "#size-cells": + '#size-cells': const: 1 ranges: true patternProperties: - "^lpc-ctrl@[0-9a-f]+$": + '^lpc-ctrl@[0-9a-f]+$': type: object additionalProperties: false @@ -92,7 +92,7 @@ patternProperties: - compatible - clocks - "^reset-controller@[0-9a-f]+$": + '^reset-controller@[0-9a-f]+$': type: object additionalProperties: false @@ -118,7 +118,7 @@ patternProperties: - compatible - '#reset-cells' - "^lpc-snoop@[0-9a-f]+$": + '^lpc-snoop@[0-9a-f]+$': type: object additionalProperties: false @@ -152,15 +152,15 @@ patternProperties: - interrupts - snoop-ports - "^uart-routing@[0-9a-f]+$": + '^uart-routing@[0-9a-f]+$': $ref: /schemas/soc/aspeed/uart-routing.yaml# description: The UART routing control under LPC register space required: - compatible - reg - - "#address-cells" - - "#size-cells" + - '#address-cells' + - '#size-cells' - ranges additionalProperties: diff --git a/Documentation/devicetree/bindings/mfd/da9052-i2c.txt b/Documentation/devicetree/bindings/mfd/da9052-i2c.txt deleted file mode 100644 index 07c69c0c6624..000000000000 --- a/Documentation/devicetree/bindings/mfd/da9052-i2c.txt +++ /dev/null @@ -1,67 +0,0 @@ -* Dialog DA9052/53 Power Management Integrated Circuit (PMIC) - -Required properties: -- compatible : Should be "dlg,da9052", "dlg,da9053-aa", - "dlg,da9053-ab", or "dlg,da9053-bb" - -Optional properties: -- dlg,tsi-as-adc : Boolean, if set the X+, X-, Y+, Y- touchscreen - input lines are used as general purpose analogue - input. -- tsiref-supply: Phandle to the regulator, which provides the reference - voltage for the TSIREF pin. Must be provided when the - touchscreen pins are used for ADC purposes. - -Sub-nodes: -- regulators : Contain the regulator nodes. The DA9052/53 regulators are - bound using their names as listed below: - - buck1 : regulator BUCK CORE - buck2 : regulator BUCK PRO - buck3 : regulator BUCK MEM - buck4 : regulator BUCK PERI - ldo1 : regulator LDO1 - ldo2 : regulator LDO2 - ldo3 : regulator LDO3 - ldo4 : regulator LDO4 - ldo5 : regulator LDO5 - ldo6 : regulator LDO6 - ldo7 : regulator LDO7 - ldo8 : regulator LDO8 - ldo9 : regulator LDO9 - ldo10 : regulator LDO10 - - The bindings details of individual regulator device can be found in: - Documentation/devicetree/bindings/regulator/regulator.txt - -Examples: - -i2c@63fc8000 { /* I2C1 */ - - pmic: dialog@48 { - compatible = "dlg,da9053-aa"; - reg = <0x48>; - - regulators { - buck1 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <2075000>; - }; - - buck2 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <2075000>; - }; - - buck3 { - regulator-min-microvolt = <925000>; - regulator-max-microvolt = <2500000>; - }; - - buck4 { - regulator-min-microvolt = <925000>; - regulator-max-microvolt = <2500000>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/mfd/dlg,da9052.yaml b/Documentation/devicetree/bindings/mfd/dlg,da9052.yaml new file mode 100644 index 000000000000..1103a8cc5cea --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/dlg,da9052.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/dlg,da9052.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Dialog DA9052/53 Power Management Integrated Circuit (PMIC) + +maintainers: + - Frank Li <Frank.Li@nxp.com> + +properties: + compatible: + oneOf: + - enum: + - dlg,da9053-aa + - dlg,da9053-ab + - dlg,da9053-bb + - dlg,da9053-bc + - dlg,da9052 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + dlg,tsi-as-adc: + type: boolean + description: + if set the X+, X-, Y+, Y- touchscreen input lines are used as general + purpose analogue input. + + tsiref-supply: + description: The reference voltage for the TSIREF pin. + + regulators: + type: object + additionalProperties: false + + patternProperties: + "^(ldo([1-9]|10)|buck[1-4])$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + +required: + - compatible + - reg + - regulators + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@48 { + compatible = "dlg,da9053-aa"; + reg = <0x48>; + + regulators { + buck1 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + }; + + buck2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + }; + + buck3 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + }; + + buck4 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml b/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml index 51612dc22748..4f08e9ac7e56 100644 --- a/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml +++ b/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml @@ -81,6 +81,8 @@ properties: watchdog: $ref: /schemas/watchdog/dlg,da9062-watchdog.yaml + wakeup-source: true + patternProperties: "^(.+-hog(-[0-9]+)?)$": type: object diff --git a/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml b/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml index d2886f2686a8..cfa69f1f380a 100644 --- a/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml +++ b/Documentation/devicetree/bindings/mfd/fsl,mc13xxx.yaml @@ -93,38 +93,14 @@ properties: leds: type: object - $ref: /schemas/leds/common.yaml# + additionalProperties: false properties: - reg: - description: | - One of - MC13783 LED IDs - 0: Main display - 1: AUX display - 2: Keypad - 3: Red 1 - 4: Green 1 - 5: Blue 1 - 6: Red 2 - 7: Green 2 - 8: Blue 2 - 9: Red 3 - 10: Green 3 - 11: Blue 3 - - MC13892 LED IDs - 0: Main display - 1: AUX display - 2: Keypad - 3: Red - 4: Green - 5: Blue - - MC34708 LED IDs - 0: Charger Red - 1: Charger Green - maxItems: 1 + '#address-cells': + const: 1 + + '#size-cells': + const: 0 led-control: $ref: /schemas/types.yaml#/definitions/uint32-array @@ -132,6 +108,42 @@ properties: Setting for LED-Control register array length depends on model, mc13783: 6, mc13892: 4, mc34708: 1 + patternProperties: + '^led@[0-9a-b]$': + $ref: /schemas/leds/common.yaml# + unevaluatedProperties: false + + properties: + reg: + description: | + One of + MC13783 LED IDs + 0: Main display + 1: AUX display + 2: Keypad + 3: Red 1 + 4: Green 1 + 5: Blue 1 + 6: Red 2 + 7: Green 2 + 8: Blue 2 + 9: Red 3 + 10: Green 3 + 11: Blue 3 + + MC13892 LED IDs + 0: Main display + 1: AUX display + 2: Keypad + 3: Red + 4: Green + 5: Blue + + MC34708 LED IDs + 0: Charger Red + 1: Charger Green + maxItems: 1 + regulators: type: object @@ -262,7 +274,7 @@ examples: #size-cells = <0>; led-control = <0x000 0x000 0x0e0 0x000>; - sysled@3 { + led@3 { reg = <3>; label = "system:red:live"; linux,default-trigger = "heartbeat"; diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77705.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77705.yaml index 0ec89f0adc64..8b62aadb4213 100644 --- a/Documentation/devicetree/bindings/mfd/maxim,max77705.yaml +++ b/Documentation/devicetree/bindings/mfd/maxim,max77705.yaml @@ -26,6 +26,18 @@ properties: interrupts: maxItems: 1 + interrupt-controller: + description: + The driver implements an interrupt controller for the sub devices. + The interrupt number mapping is as follows + 0 - charger + 1 - topsys + 2 - fuelgauge + 3 - usb type-c management block. + + '#interrupt-cells': + const: 1 + haptic: type: object additionalProperties: false @@ -118,8 +130,10 @@ examples: pmic@66 { compatible = "maxim,max77705"; reg = <0x66>; + #interrupt-cells = <1>; interrupt-parent = <&pm8998_gpios>; interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; pinctrl-0 = <&chg_int_default>; pinctrl-names = "default"; diff --git a/Documentation/devicetree/bindings/mfd/nxp,pf1550.yaml b/Documentation/devicetree/bindings/mfd/nxp,pf1550.yaml new file mode 100644 index 000000000000..e50dc44252c6 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/nxp,pf1550.yaml @@ -0,0 +1,161 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/nxp,pf1550.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PF1550 Power Management IC + +maintainers: + - Samuel Kayode <samuel.kayode@savoirfairelinux.com> + +description: + PF1550 PMIC provides battery charging and power supply for low power IoT and + wearable applications. This device consists of an i2c controlled MFD that + includes regulators, battery charging and an onkey/power button. + +$ref: /schemas/power/supply/power-supply.yaml + +properties: + compatible: + const: nxp,pf1550 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + wakeup-source: true + + regulators: + type: object + additionalProperties: false + + patternProperties: + "^(ldo[1-3]|sw[1-3]|vrefddr)$": + type: object + $ref: /schemas/regulator/regulator.yaml + description: + regulator configuration for ldo1-3, buck converters(sw1-3) + and DDR termination reference voltage (vrefddr) + unevaluatedProperties: false + + monitored-battery: + description: | + A phandle to a monitored battery node that contains a valid value + for: + constant-charge-voltage-max-microvolt. + + nxp,thermal-regulation-celsius: + description: + Temperature threshold for thermal regulation of charger in celsius. + enum: [ 80, 95, 110, 125 ] + + nxp,min-system-microvolt: + description: + System specific lower limit voltage. + enum: [ 3500000, 3700000, 4300000 ] + + nxp,disable-key-power: + type: boolean + description: + Disable power-down using a long key-press. The onkey driver will remove + support for the KEY_POWER key press when triggered using a long press of + the onkey. + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/input/linux-event-codes.h> + + battery: battery-cell { + compatible = "simple-battery"; + constant-charge-voltage-max-microvolt = <4400000>; + }; + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@8 { + compatible = "nxp,pf1550"; + reg = <0x8>; + + interrupt-parent = <&gpio1>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + monitored-battery = <&battery>; + nxp,min-system-microvolt = <4300000>; + nxp,thermal-regulation-celsius = <80>; + + regulators { + sw1_reg: sw1 { + regulator-name = "sw1"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1387500>; + regulator-always-on; + regulator-ramp-delay = <6250>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-min-microvolt = <1270000>; + }; + }; + + sw2_reg: sw2 { + regulator-name = "sw2"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1387500>; + regulator-always-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + sw3_reg: sw3 { + regulator-name = "sw3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vldo1_reg: ldo1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vldo2_reg: ldo2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vldo3_reg: ldo3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 078a6886f8b1..65c80e3b4500 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -43,6 +43,7 @@ properties: - qcom,pm7250b - qcom,pm7550ba - qcom,pm7325 + - qcom,pm7550 - qcom,pm8004 - qcom,pm8005 - qcom,pm8009 @@ -84,6 +85,7 @@ properties: - qcom,pmi8994 - qcom,pmi8998 - qcom,pmih0108 + - qcom,pmiv0104 - qcom,pmk8002 - qcom,pmk8350 - qcom,pmk8550 diff --git a/Documentation/devicetree/bindings/mfd/renesas,r2a11302ft.yaml b/Documentation/devicetree/bindings/mfd/renesas,r2a11302ft.yaml new file mode 100644 index 000000000000..7b96619ebd8c --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/renesas,r2a11302ft.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/renesas,r2a11302ft.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas R2A11302FT Power Supply ICs for R-Car + +maintainers: + - Wolfram Sang <wsa+renesas@sang-engineering.com> + +description: | + The Renesas R2A11302FT PMIC is used with Renesas R-Car Gen1/Gen2 + based SoCs. + + FIXME: The binding is incomplete and resembles the information gathered + so far. + +properties: + compatible: + const: renesas,r2a11302ft + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 6000000 + + spi-cpol: true + + spi-cpha: true + +required: + - compatible + - reg + - spi-cpol + - spi-cpha + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + pmic@0 { + compatible = "renesas,r2a11302ft"; + reg = <0>; + spi-max-frequency = <6000000>; + spi-cpol; + spi-cpha; + }; + }; +... diff --git a/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml b/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml index ee0be32ac020..4f829fe75d41 100644 --- a/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml +++ b/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml @@ -32,6 +32,17 @@ properties: Specifying the power good GPIOs. maxItems: 1 + enable-gpios: + maxItems: 1 + + vcom-en-gpios: + maxItems: 1 + + vin-supply: + description: + Supply for the whole chip. Some vendor kernels and devicetrees + declare this as a non-existing GPIO named "pwrall". + regulators: type: object diff --git a/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml b/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml index b2cfa4120b8a..ce5e845ab5c5 100644 --- a/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml +++ b/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml @@ -444,7 +444,6 @@ properties: additionalProperties: false - regulator-external: description: Node describing the AB8500 external regulators. This concerns the autonomous regulators VSMPS1, VSMPS2 and VSMPS3 diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 657c38175fba..55efb83b1495 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -85,6 +85,7 @@ select: - mediatek,mt2701-pctl-a-syscfg - mediatek,mt2712-pctl-a-syscfg - mediatek,mt6397-pctl-pmic-syscfg + - mediatek,mt7981-topmisc - mediatek,mt7988-topmisc - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg @@ -133,111 +134,126 @@ select: properties: compatible: - items: - - enum: - - airoha,en7581-pbus-csr - - al,alpine-sysfabric-service - - allwinner,sun8i-a83t-system-controller - - allwinner,sun8i-h3-system-controller - - allwinner,sun8i-v3s-system-controller - - allwinner,sun50i-a64-system-controller - - altr,l3regs - - altr,sdr-ctl - - amd,pensando-elba-syscon - - amlogic,meson-mx-assist - - amlogic,meson-mx-bootrom - - amlogic,meson8-analog-top - - amlogic,meson8b-analog-top - - amlogic,meson8-pmu - - amlogic,meson8b-pmu - - apm,merlin-poweroff-mailbox - - apm,mustang-poweroff-mailbox - - apm,xgene-csw - - apm,xgene-efuse - - apm,xgene-mcb - - apm,xgene-rb - - apm,xgene-scu - - atmel,sama5d2-sfrbu - - atmel,sama5d3-nfc-io - - atmel,sama5d3-sfrbu - - atmel,sama5d4-sfrbu - - axis,artpec6-syscon - - brcm,cru-clkset - - brcm,sr-cdru - - brcm,sr-mhb - - cirrus,ep7209-syscon1 - - cirrus,ep7209-syscon2 - - cirrus,ep7209-syscon3 - - cnxt,cx92755-uc - - freecom,fsg-cs2-system-controller - - fsl,imx93-aonmix-ns-syscfg - - fsl,imx93-wakeupmix-syscfg - - fsl,ls1088a-reset - - fsl,vf610-anatop - - fsl,vf610-mscm-cpucfg - - hisilicon,dsa-subctrl - - hisilicon,hi6220-sramctrl - - hisilicon,hip04-ppe - - hisilicon,pcie-sas-subctrl - - hisilicon,peri-subctrl - - hpe,gxp-sysreg - - loongson,ls1b-syscon - - loongson,ls1c-syscon - - lsi,axxia-syscon - - marvell,armada-3700-cpu-misc - - marvell,armada-3700-nb-pm - - marvell,armada-3700-avs - - marvell,armada-3700-usb2-host-device-misc - - marvell,armada-3700-usb2-host-misc - - marvell,dove-global-config - - mediatek,mt2701-pctl-a-syscfg - - mediatek,mt2712-pctl-a-syscfg - - mediatek,mt6397-pctl-pmic-syscfg - - mediatek,mt7988-topmisc - - mediatek,mt8135-pctl-a-syscfg - - mediatek,mt8135-pctl-b-syscfg - - mediatek,mt8173-pctl-a-syscfg - - mediatek,mt8365-infracfg-nao - - mediatek,mt8365-syscfg - - microchip,lan966x-cpu-syscon - - microchip,mpfs-control-scb - - microchip,mpfs-sysreg-scb - - microchip,sam9x60-sfr - - microchip,sama7d65-ddr3phy - - microchip,sama7d65-sfrbu - - microchip,sama7g5-ddr3phy - - mscc,ocelot-cpu-syscon - - mstar,msc313-pmsleep - - nuvoton,ma35d1-sys - - nuvoton,wpcm450-shm - - qcom,apq8064-mmss-sfpb - - qcom,apq8064-sps-sic - - rockchip,px30-qos - - rockchip,rk3036-qos - - rockchip,rk3066-qos - - rockchip,rk3128-qos - - rockchip,rk3228-qos - - rockchip,rk3288-qos - - rockchip,rk3368-qos - - rockchip,rk3399-qos - - rockchip,rk3528-qos - - rockchip,rk3562-qos - - rockchip,rk3568-qos - - rockchip,rk3576-qos - - rockchip,rk3588-qos - - rockchip,rv1126-qos - - st,spear1340-misc - - stericsson,nomadik-pmu - - starfive,jh7100-sysmain - - ti,am62-opp-efuse-table - - ti,am62-usb-phy-ctrl - - ti,am625-dss-oldi-io-ctrl - - ti,am62p-cpsw-mac-efuse - - ti,am654-dss-oldi-io-ctrl - - ti,j784s4-acspcie-proxy-ctrl - - ti,j784s4-pcie-ctrl - - ti,keystone-pllctrl - - const: syscon + oneOf: + - items: + - enum: + - airoha,en7581-pbus-csr + - al,alpine-sysfabric-service + - allwinner,sun8i-a83t-system-controller + - allwinner,sun8i-h3-system-controller + - allwinner,sun8i-v3s-system-controller + - allwinner,sun50i-a64-system-controller + - altr,l3regs + - altr,sdr-ctl + - amd,pensando-elba-syscon + - amlogic,meson-mx-assist + - amlogic,meson-mx-bootrom + - amlogic,meson8-analog-top + - amlogic,meson8b-analog-top + - amlogic,meson8-pmu + - amlogic,meson8b-pmu + - apm,merlin-poweroff-mailbox + - apm,mustang-poweroff-mailbox + - apm,xgene-csw + - apm,xgene-efuse + - apm,xgene-mcb + - apm,xgene-rb + - apm,xgene-scu + - atmel,sama5d2-sfrbu + - atmel,sama5d3-nfc-io + - atmel,sama5d3-sfrbu + - atmel,sama5d4-sfrbu + - axis,artpec6-syscon + - brcm,cru-clkset + - brcm,sr-cdru + - brcm,sr-mhb + - cirrus,ep7209-syscon1 + - cirrus,ep7209-syscon2 + - cirrus,ep7209-syscon3 + - cnxt,cx92755-uc + - freecom,fsg-cs2-system-controller + - fsl,imx93-aonmix-ns-syscfg + - fsl,imx93-wakeupmix-syscfg + - fsl,ls1088a-reset + - fsl,vf610-anatop + - fsl,vf610-mscm-cpucfg + - hisilicon,dsa-subctrl + - hisilicon,hi6220-sramctrl + - hisilicon,hip04-ppe + - hisilicon,pcie-sas-subctrl + - hisilicon,peri-subctrl + - hpe,gxp-sysreg + - loongson,ls1b-syscon + - loongson,ls1c-syscon + - lsi,axxia-syscon + - marvell,armada-3700-cpu-misc + - marvell,armada-3700-nb-pm + - marvell,armada-3700-avs + - marvell,armada-3700-usb2-host-device-misc + - marvell,armada-3700-usb2-host-misc + - marvell,dove-global-config + - mediatek,mt2701-pctl-a-syscfg + - mediatek,mt2712-pctl-a-syscfg + - mediatek,mt6397-pctl-pmic-syscfg + - mediatek,mt7988-topmisc + - mediatek,mt8135-pctl-a-syscfg + - mediatek,mt8135-pctl-b-syscfg + - mediatek,mt8173-pctl-a-syscfg + - mediatek,mt8365-infracfg-nao + - mediatek,mt8365-syscfg + - microchip,lan966x-cpu-syscon + - microchip,mpfs-control-scb + - microchip,mpfs-sysreg-scb + - microchip,sam9x60-sfr + - microchip,sama7d65-ddr3phy + - microchip,sama7d65-sfrbu + - microchip,sama7g5-ddr3phy + - mscc,ocelot-cpu-syscon + - mstar,msc313-pmsleep + - nuvoton,ma35d1-sys + - nuvoton,wpcm450-shm + - qcom,apq8064-mmss-sfpb + - qcom,apq8064-sps-sic + - rockchip,px30-qos + - rockchip,rk3036-qos + - rockchip,rk3066-qos + - rockchip,rk3128-qos + - rockchip,rk3228-qos + - rockchip,rk3288-qos + - rockchip,rk3368-qos + - rockchip,rk3399-qos + - rockchip,rk3528-qos + - rockchip,rk3562-qos + - rockchip,rk3568-qos + - rockchip,rk3576-qos + - rockchip,rk3588-qos + - rockchip,rv1126-qos + - st,spear1340-misc + - stericsson,nomadik-pmu + - starfive,jh7100-sysmain + - ti,am62-opp-efuse-table + - ti,am62-usb-phy-ctrl + - ti,am625-dss-oldi-io-ctrl + - ti,am62p-cpsw-mac-efuse + - ti,am654-dss-oldi-io-ctrl + - ti,j784s4-acspcie-proxy-ctrl + - ti,j784s4-pcie-ctrl + - ti,keystone-pllctrl + - const: syscon + - items: + - enum: + - microchip,sama7g5-sfrbu + - microchip,sama7d65-sfrbu + - const: atmel,sama5d2-sfrbu + - const: syscon + - items: + - const: microchip,pic64gx-control-scb + - const: microchip,mpfs-control-scb + - const: syscon + - items: + - const: microchip,pic64gx-sysreg-scb + - const: microchip,mpfs-sysreg-scb + - const: syscon reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mfd/ti,tps65910.yaml b/Documentation/devicetree/bindings/mfd/ti,tps65910.yaml index a2668fc30a7b..f1a76f88fc0c 100644 --- a/Documentation/devicetree/bindings/mfd/ti,tps65910.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,tps65910.yaml @@ -166,9 +166,6 @@ patternProperties: required: - compatible - reg - - interrupts - - interrupt-controller - - '#interrupt-cells' - gpio-controller - '#gpio-cells' - regulators diff --git a/Documentation/devicetree/bindings/mfd/ti,twl.yaml b/Documentation/devicetree/bindings/mfd/ti,twl.yaml index 776b04e182cb..9cc3e4721612 100644 --- a/Documentation/devicetree/bindings/mfd/ti,twl.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,twl.yaml @@ -55,6 +55,15 @@ allOf: gpadc: false + pwrbutton: + properties: + compatible: + const: ti,twl4030-pwrbutton + interrupts: + items: + - items: + const: 8 + usb-comparator: false - if: @@ -95,7 +104,14 @@ allOf: compatible: const: ti,twl6030-gpadc - pwrbutton: false + pwrbutton: + properties: + compatible: + const: ti,twl6030-pwrbutton + interrupts: + items: + - items: + const: 0 madc: false @@ -146,7 +162,14 @@ allOf: compatible: const: ti,twl6032-gpadc - pwrbutton: false + pwrbutton: + properties: + compatible: + const: ti,twl6030-pwrbutton + interrupts: + items: + - items: + const: 0 madc: false @@ -226,11 +249,11 @@ properties: properties: compatible: - const: ti,twl4030-pwrbutton + enum: + - ti,twl4030-pwrbutton + - ti,twl6030-pwrbutton interrupts: - items: - - items: - const: 8 + maxItems: 1 watchdog: type: object @@ -400,7 +423,7 @@ properties: - '#pwm-cells' patternProperties: - "^regulator-": + '^regulator-': type: object unevaluatedProperties: false $ref: /schemas/regulator/regulator.yaml @@ -429,7 +452,7 @@ required: - reg - interrupts - interrupt-controller - - "#interrupt-cells" + - '#interrupt-cells' examples: - | @@ -459,6 +482,11 @@ examples: #io-channel-cells = <1>; }; + pwrbutton { + compatible = "ti,twl6030-pwrbutton"; + interrupts = <0>; + }; + rtc { compatible = "ti,twl4030-rtc"; interrupts = <8>; diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml index 493655a38b37..0936bfef8c75 100644 --- a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml +++ b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml @@ -21,9 +21,11 @@ properties: - items: - enum: - brcm,bcm2712-sdhci + - brcm,bcm72116-sdhci - brcm,bcm74165b0-sdhci - brcm,bcm7445-sdhci - brcm,bcm7425-sdhci + - brcm,bcm74371-sdhci - const: brcm,sdhci-brcmstb reg: diff --git a/Documentation/devicetree/bindings/mmc/davinci_mmc.txt b/Documentation/devicetree/bindings/mmc/davinci_mmc.txt deleted file mode 100644 index 516fb0143d4c..000000000000 --- a/Documentation/devicetree/bindings/mmc/davinci_mmc.txt +++ /dev/null @@ -1,32 +0,0 @@ -* TI Highspeed MMC host controller for DaVinci - -The Highspeed MMC Host Controller on TI DaVinci family -provides an interface for MMC, SD and SDIO types of memory cards. - -This file documents the properties used by the davinci_mmc driver. - -Required properties: -- compatible: - Should be "ti,da830-mmc": for da830, da850, dm365 - Should be "ti,dm355-mmc": for dm355, dm644x - -Optional properties: -- bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1> -- max-frequency: Maximum operating clock frequency, default 25MHz. -- dmas: List of DMA specifiers with the controller specific format - as described in the generic DMA client binding. A tx and rx - specifier is required. -- dma-names: RX and TX DMA request names. These strings correspond - 1:1 with the DMA specifiers listed in dmas. - -Example: -mmc0: mmc@1c40000 { - compatible = "ti,da830-mmc", - reg = <0x40000 0x1000>; - interrupts = <16>; - bus-width = <4>; - max-frequency = <50000000>; - dmas = <&edma 16 - &edma 17>; - dma-names = "rx", "tx"; -}; diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml index bf273115235b..acb9fb9a92cd 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml @@ -38,6 +38,7 @@ properties: - rockchip,rk3328-dw-mshc - rockchip,rk3368-dw-mshc - rockchip,rk3399-dw-mshc + - rockchip,rk3506-dw-mshc - rockchip,rk3528-dw-mshc - rockchip,rk3562-dw-mshc - rockchip,rk3568-dw-mshc diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml index 676a74695389..242a3c6b925c 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml @@ -50,8 +50,7 @@ properties: - const: clk_ahb - const: clk_xin - dma-coherent: - type: boolean + dma-coherent: true # PHY output tap delays: # Used to delay the data valid window and align it to the sampling clock. diff --git a/Documentation/devicetree/bindings/mmc/sdhci-milbeaut.txt b/Documentation/devicetree/bindings/mmc/sdhci-milbeaut.txt deleted file mode 100644 index 627ee89c125b..000000000000 --- a/Documentation/devicetree/bindings/mmc/sdhci-milbeaut.txt +++ /dev/null @@ -1,30 +0,0 @@ -* SOCIONEXT Milbeaut SDHCI controller - -This file documents differences between the core properties in mmc.txt -and the properties used by the sdhci_milbeaut driver. - -Required properties: -- compatible: "socionext,milbeaut-m10v-sdhci-3.0" -- clocks: Must contain an entry for each entry in clock-names. It is a - list of phandles and clock-specifier pairs. - See ../clocks/clock-bindings.txt for details. -- clock-names: Should contain the following two entries: - "iface" - clock used for sdhci interface - "core" - core clock for sdhci controller - -Optional properties: -- fujitsu,cmd-dat-delay-select: boolean property indicating that this host - requires the CMD_DAT_DELAY control to be enabled. - -Example: - sdhci3: mmc@1b010000 { - compatible = "socionext,milbeaut-m10v-sdhci-3.0"; - reg = <0x1b010000 0x10000>; - interrupts = <0 265 0x4>; - voltage-ranges = <3300 3300>; - bus-width = <4>; - clocks = <&clk 7>, <&ahb_clk>; - clock-names = "core", "iface"; - cap-sdio-irq; - fujitsu,cmd-dat-delay-select; - }; diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index 594bd174ff21..938be8228d66 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -42,6 +42,7 @@ properties: - qcom,ipq5424-sdhci - qcom,ipq6018-sdhci - qcom,ipq9574-sdhci + - qcom,kaanapali-sdhci - qcom,milos-sdhci - qcom,qcm2290-sdhci - qcom,qcs404-sdhci @@ -70,6 +71,7 @@ properties: - qcom,sm8450-sdhci - qcom,sm8550-sdhci - qcom,sm8650-sdhci + - qcom,sm8750-sdhci - qcom,x1e80100-sdhci - const: qcom,sdhci-msm-v5 # for sdcc version 5.0 diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml index f882219a0a26..7e7c55dc2440 100644 --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml @@ -30,6 +30,7 @@ properties: - sophgo,sg2002-dwcmshc - sophgo,sg2042-dwcmshc - thead,th1520-dwcmshc + - eswin,eic7700-dwcmshc reg: maxItems: 1 @@ -52,17 +53,30 @@ properties: maxItems: 5 reset-names: - items: - - const: core - - const: bus - - const: axi - - const: block - - const: timer + maxItems: 5 rockchip,txclk-tapnum: description: Specify the number of delay for tx sampling. $ref: /schemas/types.yaml#/definitions/uint8 + eswin,hsp-sp-csr: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to HSP(High-Speed Peripheral) device + - description: Offset of the stability status register for internal + clock. + - description: Offset of the stability register for host regulator + voltage. + description: + HSP CSR is to control and get status of different high-speed peripherals + (such as Ethernet, USB, SATA, etc.) via register, which can tune + board-level's parameters of PHY, etc. + + eswin,drive-impedance-ohms: + description: Specifies the drive impedance in Ohm. + enum: [33, 40, 50, 66, 100] + required: - compatible - reg @@ -114,6 +128,37 @@ allOf: properties: compatible: contains: + const: eswin,eic7700-dwcmshc + then: + properties: + resets: + minItems: 4 + maxItems: 4 + reset-names: + items: + - const: axi + - const: phy + - const: prstn + - const: txrx + required: + - eswin,hsp-sp-csr + - eswin,drive-impedance-ohms + else: + properties: + resets: + maxItems: 5 + reset-names: + items: + - const: core + - const: bus + - const: axi + - const: block + - const: timer + + - if: + properties: + compatible: + contains: const: rockchip,rk3576-dwcmshc then: diff --git a/Documentation/devicetree/bindings/mmc/socionext,milbeaut-m10v-sdhci-3.0.yaml b/Documentation/devicetree/bindings/mmc/socionext,milbeaut-m10v-sdhci-3.0.yaml new file mode 100644 index 000000000000..2ba53626a959 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/socionext,milbeaut-m10v-sdhci-3.0.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/socionext,milbeaut-m10v-sdhci-3.0.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SOCIONEXT Milbeaut SDHCI controller + +maintainers: + - Taichi Sugaya <sugaya.taichi@socionext.com> + - Takao Orito <orito.takao@socionext.com> + +description: + The SOCIONEXT Milbeaut SDHCI controller is a specialized SD Host + Controller found in some of Socionext's Milbeaut image processing SoCs. + It features a dedicated "bridge controller." This bridge controller + implements special functions like reset control, clock management for + various SDR modes (SDR12, SDR25, SDR50) and physical pin property settings. + +allOf: + - $ref: sdhci-common.yaml# + +properties: + compatible: + const: socionext,milbeaut-m10v-sdhci-3.0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: core + - const: iface + + fujitsu,cmd-dat-delay-select: + description: + Its presence indicates that the controller requires a specific command + and data line delay selection mechanism for proper operation, particularly + when dealing with high-speed SD/eMMC modes. + type: boolean + + voltage-ranges: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: minimum slot voltage (mV). + - description: maximum slot voltage (mV). + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + mmc@1b010000 { + compatible = "socionext,milbeaut-m10v-sdhci-3.0"; + reg = <0x1b010000 0x10000>; + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; + voltage-ranges = <3300 3300>; + bus-width = <4>; + clocks = <&clk 7>, <&ahb_clk>; + clock-names = "core", "iface"; + cap-sdio-irq; + fujitsu,cmd-dat-delay-select; + }; +... diff --git a/Documentation/devicetree/bindings/mmc/ti,da830-mmc.yaml b/Documentation/devicetree/bindings/mmc/ti,da830-mmc.yaml new file mode 100644 index 000000000000..36b33dde086b --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/ti,da830-mmc.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/ti,da830-mmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI Highspeed MMC host controller for DaVinci + +description: + The Highspeed MMC Host Controller on TI DaVinci family + provides an interface for MMC, SD and SDIO types of memory cards. + +allOf: + - $ref: mmc-controller.yaml + +maintainers: + - Kishon Vijay Abraham I <kishon@kernel.org> + +properties: + compatible: + enum: + - ti,da830-mmc + - ti,dm355-mmc + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interrupts: + maxItems: 2 + + dmas: + maxItems: 2 + + dma-names: + items: + - const: rx + - const: tx + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + mmc@1c40000 { + compatible = "ti,da830-mmc"; + reg = <0x40000 0x1000>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>, + <17 IRQ_TYPE_LEVEL_HIGH>; + bus-width = <4>; + max-frequency = <50000000>; + dmas = <&edma 16>, <&edma 17>; + dma-names = "rx", "tx"; + }; +... diff --git a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml index 054b6b8bf9b9..9d061e2216cb 100644 --- a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml @@ -6,9 +6,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A10 NAND Controller -allOf: - - $ref: nand-controller.yaml - maintainers: - Chen-Yu Tsai <wens@csie.org> - Maxime Ripard <mripard@kernel.org> @@ -18,6 +15,8 @@ properties: enum: - allwinner,sun4i-a10-nand - allwinner,sun8i-a23-nand-controller + - allwinner,sun50i-h616-nand-controller + reg: maxItems: 1 @@ -25,14 +24,20 @@ properties: maxItems: 1 clocks: + minItems: 2 items: - description: Bus Clock - description: Module Clock + - description: ECC Clock + - description: MBus Clock clock-names: + minItems: 2 items: - const: ahb - const: mod + - const: ecc + - const: mbus resets: maxItems: 1 @@ -85,6 +90,36 @@ required: unevaluatedProperties: false +allOf: + - $ref: nand-controller.yaml + + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun4i-a10-nand + - allwinner,sun8i-a23-nand-controller + then: + properties: + clocks: + maxItems: 2 + clock-names: + maxItems: 2 + + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun50i-h616-nand-controller + then: + properties: + clocks: + minItems: 4 + clock-names: + minItems: 4 + examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml index 284f0f882c32..fa2aa29be794 100644 --- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml @@ -88,7 +88,6 @@ patternProperties: amlogic,boot-pages: [nand-is-boot-medium, "amlogic,boot-page-step"] amlogic,boot-page-step: [nand-is-boot-medium, "amlogic,boot-pages"] - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml index 1ecea848e8b9..bc89cbf8193a 100644 --- a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml @@ -145,7 +145,6 @@ allOf: clock-names: minItems: 1 - unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml b/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml index 1b375dee83b0..a9ec3ca002c7 100644 --- a/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml +++ b/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml @@ -69,6 +69,16 @@ properties: minItems: 1 maxItems: 8 + clocks: + description: | + Chips may need clocks to be enabled for themselves or for transparent + bridges. + + power-domains: + description: | + Chips may need power domains to be enabled for themselves or for + transparent bridges. + bank-width: description: Width (in bytes) of the bank. Equal to the device width times the number of interleaved chips. diff --git a/Documentation/devicetree/bindings/mux/mux-controller.yaml b/Documentation/devicetree/bindings/mux/mux-controller.yaml index 571ad9e13ecf..78340bbe4df6 100644 --- a/Documentation/devicetree/bindings/mux/mux-controller.yaml +++ b/Documentation/devicetree/bindings/mux/mux-controller.yaml @@ -20,7 +20,6 @@ description: | space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer, 0-7 for an 8-way multiplexer, etc. - Mux controller nodes -------------------- diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml index fc62fb2a68ac..323a669fa982 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml @@ -201,7 +201,6 @@ allOf: - clocks - resets - mdio@2: $ref: mdio.yaml# unevaluatedProperties: false @@ -251,7 +250,6 @@ allOf: maxItems: 1 power-domains: false - unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml b/Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml index 0e3fb4e42e3f..a1119c47e29b 100644 --- a/Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml +++ b/Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml @@ -31,7 +31,6 @@ properties: - description: RX and TX rings interrupt line - description: Wake-on-LAN interrupt line - clocks: minItems: 1 items: diff --git a/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.yaml b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.yaml index 3f27746d9a56..d544f785e6b9 100644 --- a/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.yaml +++ b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.yaml @@ -29,7 +29,6 @@ properties: maxItems: 1 description: core clock driving the MDIO block - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml index 44fd23a5fa2b..a930358f6a66 100644 --- a/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml +++ b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml @@ -100,7 +100,6 @@ examples: }; }; - ethernet@60000000 { compatible = "cortina,gemini-ethernet"; reg = <0x60000000 0x4000>, /* Global registers, queue */ diff --git a/Documentation/devicetree/bindings/net/ethernet-switch.yaml b/Documentation/devicetree/bindings/net/ethernet-switch.yaml index b3b7e1a1b127..6bb68f7dbc7f 100644 --- a/Documentation/devicetree/bindings/net/ethernet-switch.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-switch.yaml @@ -35,14 +35,14 @@ allOf: then: properties: $nodename: - pattern: "switch[0-3]@[0-3]+$" + pattern: 'switch[0-3]@[0-3]+$' else: properties: $nodename: - pattern: "^(ethernet-)?switch(@.*)?$" + pattern: '^(ethernet-)?switch(@.*)?$' patternProperties: - "^(ethernet-)?ports$": + '^(ethernet-)?ports$': type: object unevaluatedProperties: false @@ -53,13 +53,13 @@ patternProperties: const: 0 patternProperties: - "^(ethernet-)?port@[0-9a-f]+$": + '^(ethernet-)?port@[0-9a-f]+$': type: object description: Ethernet switch ports required: - - "#address-cells" - - "#size-cells" + - '#address-cells' + - '#size-cells' oneOf: - required: @@ -75,9 +75,9 @@ $defs: $ref: '#' patternProperties: - "^(ethernet-)?ports$": + '^(ethernet-)?ports$': patternProperties: - "^(ethernet-)?port@[0-9a-f]+$": + '^(ethernet-)?port@[0-9a-f]+$': description: Ethernet switch ports $ref: ethernet-switch-port.yaml# unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/net/fsl,gianfar.yaml b/Documentation/devicetree/bindings/net/fsl,gianfar.yaml index f92f284aa05b..0d8909770ccb 100644 --- a/Documentation/devicetree/bindings/net/fsl,gianfar.yaml +++ b/Documentation/devicetree/bindings/net/fsl,gianfar.yaml @@ -167,8 +167,6 @@ allOf: - description: Receive interrupt - description: Error interrupt - - unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/net/mdio-mux-multiplexer.yaml b/Documentation/devicetree/bindings/net/mdio-mux-multiplexer.yaml index 282987074ee4..23947ba6aeaf 100644 --- a/Documentation/devicetree/bindings/net/mdio-mux-multiplexer.yaml +++ b/Documentation/devicetree/bindings/net/mdio-mux-multiplexer.yaml @@ -14,7 +14,6 @@ description: |+ of a mux producer device. The mux producer can be of any type like mmio mux producer, gpio mux producer or generic register based mux producer. - allOf: - $ref: /schemas/net/mdio-mux.yaml# diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml index b4a79912d473..c7f5f2ef7452 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml @@ -24,7 +24,6 @@ description: iommu/iommu.txt and iommu/arm,smmu.yaml for more information about SMMU bindings. - - | -------- --------- | | | | diff --git a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml index d14ca81f70e0..8b5da602a2e8 100644 --- a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml +++ b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml @@ -156,7 +156,6 @@ patternProperties: CPSW MDIO bus. $ref: ti,davinci-mdio.yaml# - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml b/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml index 75c9489f319b..9de5fdefcbcc 100644 --- a/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml +++ b/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml @@ -50,7 +50,6 @@ properties: Points to the node of the regulator that powers/enable the wl12xx/wl18xx chip. This is required when connected via SPI. - ref-clock-frequency: $ref: /schemas/types.yaml#/definitions/uint32 description: Reference clock frequency. diff --git a/Documentation/devicetree/bindings/npu/arm,ethos.yaml b/Documentation/devicetree/bindings/npu/arm,ethos.yaml new file mode 100644 index 000000000000..716c4997f976 --- /dev/null +++ b/Documentation/devicetree/bindings/npu/arm,ethos.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/npu/arm,ethos.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm Ethos U65/U85 + +maintainers: + - Rob Herring <robh@kernel.org> + +description: > + The Arm Ethos-U NPUs are designed for IoT inference applications. The NPUs + can accelerate 8-bit and 16-bit integer quantized networks: + + Transformer networks (U85 only) + Convolutional Neural Networks (CNN) + Recurrent Neural Networks (RNN) + + Further documentation is available here: + + U65 TRM: https://developer.arm.com/documentation/102023/ + U85 TRM: https://developer.arm.com/documentation/102685/ + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx93-npu + - const: arm,ethos-u65 + - items: + - {} + - const: arm,ethos-u85 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: core + - const: apb + + power-domains: + maxItems: 1 + + sram: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/imx93-clock.h> + + npu@4a900000 { + compatible = "fsl,imx93-npu", "arm,ethos-u65"; + reg = <0x4a900000 0x1000>; + interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&mlmix>; + clocks = <&clk IMX93_CLK_ML>, <&clk IMX93_CLK_ML_APB>; + clock-names = "core", "apb"; + sram = <&sram>; + }; +... diff --git a/Documentation/devicetree/bindings/nvmem/brcm,ocotp.txt b/Documentation/devicetree/bindings/nvmem/brcm,ocotp.txt deleted file mode 100644 index 0415265c215a..000000000000 --- a/Documentation/devicetree/bindings/nvmem/brcm,ocotp.txt +++ /dev/null @@ -1,17 +0,0 @@ -Broadcom OTP memory controller - -Required Properties: -- compatible: "brcm,ocotp" for the first generation Broadcom OTPC which is used - in Cygnus and supports 32 bit read/write. Use "brcm,ocotp-v2" for the second - generation Broadcom OTPC which is used in SoC's such as Stingray and supports - 64-bit read/write. -- reg: Base address of the OTP controller. -- brcm,ocotp-size: Amount of memory available, in 32 bit words - -Example: - -otp: otp@301c800 { - compatible = "brcm,ocotp"; - reg = <0x0301c800 0x2c>; - brcm,ocotp-size = <2048>; -}; diff --git a/Documentation/devicetree/bindings/nvmem/brcm,ocotp.yaml b/Documentation/devicetree/bindings/nvmem/brcm,ocotp.yaml new file mode 100644 index 000000000000..ffad28417488 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/brcm,ocotp.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/brcm,ocotp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom OTP memory controller + +maintainers: + - Ray Jui <rjui@broadcom.com> + - Scott Branden <sbranden@broadcom.com> + +properties: + compatible: + enum: + - brcm,ocotp + - brcm,ocotp-v2 + + reg: + maxItems: 1 + + brcm,ocotp-size: + description: Amount of memory available, in 32-bit words + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + - brcm,ocotp-size + +additionalProperties: false + +examples: + - | + otp@301c800 { + compatible = "brcm,ocotp"; + reg = <0x0301c800 0x2c>; + brcm,ocotp-size = <2048>; + }; diff --git a/Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml b/Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml index 5d3f48a001b7..f516db47ab20 100644 --- a/Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml +++ b/Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml @@ -93,7 +93,6 @@ allOf: reg-names: minItems: 3 - unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml b/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml index 79a21ba0f9fd..d67cb7a850a3 100644 --- a/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml @@ -20,9 +20,10 @@ allOf: select: properties: compatible: - enum: - - amlogic,axg-pcie - - amlogic,g12a-pcie + contains: + enum: + - amlogic,axg-pcie + - amlogic,g12a-pcie required: - compatible @@ -36,13 +37,13 @@ properties: reg: items: - - description: External local bus interface registers + - description: Data Bus Interface registers - description: Meson designed configuration registers - description: PCIe configuration space reg-names: items: - - const: elbi + - const: dbi - const: cfg - const: config @@ -51,15 +52,15 @@ properties: clocks: items: + - description: PCIe PHY clock - description: PCIe GEN 100M PLL clock - description: PCIe RC clock gate - - description: PCIe PHY clock clock-names: items: + - const: general - const: pclk - const: port - - const: general phys: maxItems: 1 @@ -88,7 +89,7 @@ required: - reg - reg-names - interrupts - - clock + - clocks - clock-names - "#address-cells" - "#size-cells" @@ -113,10 +114,10 @@ examples: pcie: pcie@f9800000 { compatible = "amlogic,axg-pcie", "snps,dw-pcie"; reg = <0xf9800000 0x400000>, <0xff646000 0x2000>, <0xf9f00000 0x100000>; - reg-names = "elbi", "cfg", "config"; + reg-names = "dbi", "cfg", "config"; interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>; - clocks = <&pclk>, <&clk_port>, <&clk_phy>; - clock-names = "pclk", "port", "general"; + clocks = <&clk_phy>, <&pclk>, <&clk_port>; + clock-names = "general", "pclk", "port"; resets = <&reset_pcie_port>, <&reset_pcie_apb>; reset-names = "port", "apb"; phys = <&pcie_phy>; diff --git a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml new file mode 100644 index 000000000000..b910a42e0843 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/cix,sky1-pcie-host.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CIX Sky1 PCIe Root Complex + +maintainers: + - Hans Zhang <hans.zhang@cixtech.com> + +description: + PCIe root complex controller based on the Cadence PCIe core. + +allOf: + - $ref: /schemas/pci/pci-host-bridge.yaml# + +properties: + compatible: + const: cix,sky1-pcie-host + + reg: + items: + - description: PCIe controller registers. + - description: ECAM registers. + - description: Remote CIX System Unit strap registers. + - description: Remote CIX System Unit status registers. + - description: Region for sending messages registers. + + reg-names: + items: + - const: reg + - const: cfg + - const: rcsu_strap + - const: rcsu_status + - const: msg + + ranges: + maxItems: 3 + +required: + - compatible + - ranges + - bus-range + - device_type + - interrupt-map + - interrupt-map-mask + - msi-map + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pcie@a010000 { + compatible = "cix,sky1-pcie-host"; + reg = <0x00 0x0a010000 0x00 0x10000>, + <0x00 0x2c000000 0x00 0x4000000>, + <0x00 0x0a000300 0x00 0x100>, + <0x00 0x0a000400 0x00 0x100>, + <0x00 0x60000000 0x00 0x00100000>; + reg-names = "reg", "cfg", "rcsu_strap", "rcsu_status", "msg"; + ranges = <0x01000000 0x00 0x60100000 0x00 0x60100000 0x00 0x00100000>, + <0x02000000 0x00 0x60200000 0x00 0x60200000 0x00 0x1fe00000>, + <0x43000000 0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0xc0 0xff>; + device_type = "pci"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH 0>, + <0 0 0 2 &gic 0 0 GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH 0>, + <0 0 0 3 &gic 0 0 GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH 0>, + <0 0 0 4 &gic 0 0 GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH 0>; + msi-map = <0xc000 &gic_its 0xc000 0x4000>; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/loongson.yaml b/Documentation/devicetree/bindings/pci/loongson.yaml index 1988465e73a1..e5bba63aa947 100644 --- a/Documentation/devicetree/bindings/pci/loongson.yaml +++ b/Documentation/devicetree/bindings/pci/loongson.yaml @@ -32,7 +32,6 @@ properties: minItems: 1 maxItems: 3 - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-mt7623.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-mt7623.yaml new file mode 100644 index 000000000000..e33bcc216e30 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-mt7623.yaml @@ -0,0 +1,164 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/mediatek-pcie-mt7623.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PCIe controller on MediaTek SoCs + +maintainers: + - Christian Marangi <ansuelsmth@gmail.com> + +properties: + compatible: + enum: + - mediatek,mt2701-pcie + - mediatek,mt7623-pcie + + reg: + minItems: 4 + maxItems: 4 + + reg-names: + items: + - const: subsys + - const: port0 + - const: port1 + - const: port2 + + clocks: + minItems: 4 + maxItems: 4 + + clock-names: + items: + - const: free_ck + - const: sys_ck0 + - const: sys_ck1 + - const: sys_ck2 + + resets: + minItems: 3 + maxItems: 3 + + reset-names: + items: + - const: pcie-rst0 + - const: pcie-rst1 + - const: pcie-rst2 + + phys: + minItems: 3 + maxItems: 3 + + phy-names: + items: + - const: pcie-phy0 + - const: pcie-phy1 + - const: pcie-phy2 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - ranges + - clocks + - clock-names + - '#interrupt-cells' + - resets + - reset-names + - phys + - phy-names + - power-domains + - pcie@0,0 + - pcie@1,0 + - pcie@2,0 + +allOf: + - $ref: /schemas/pci/pci-host-bridge.yaml# + +unevaluatedProperties: false + +examples: + # MT7623 + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/mt2701-clk.h> + #include <dt-bindings/reset/mt2701-resets.h> + #include <dt-bindings/phy/phy.h> + #include <dt-bindings/power/mt2701-power.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pcie@1a140000 { + compatible = "mediatek,mt7623-pcie"; + device_type = "pci"; + reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */ + <0 0x1a142000 0 0x1000>, /* Port0 registers */ + <0 0x1a143000 0 0x1000>, /* Port1 registers */ + <0 0x1a144000 0 0x1000>; /* Port2 registers */ + reg-names = "subsys", "port0", "port1", "port2"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 0>; + interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>; + clocks = <&topckgen CLK_TOP_ETHIF_SEL>, + <&hifsys CLK_HIFSYS_PCIE0>, + <&hifsys CLK_HIFSYS_PCIE1>, + <&hifsys CLK_HIFSYS_PCIE2>; + clock-names = "free_ck", "sys_ck0", "sys_ck1", "sys_ck2"; + resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>, + <&hifsys MT2701_HIFSYS_PCIE1_RST>, + <&hifsys MT2701_HIFSYS_PCIE2_RST>; + reset-names = "pcie-rst0", "pcie-rst1", "pcie-rst2"; + phys = <&pcie0_phy PHY_TYPE_PCIE>, <&pcie1_phy PHY_TYPE_PCIE>, + <&pcie2_phy PHY_TYPE_PCIE>; + phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; + bus-range = <0x00 0xff>; + ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000>, /* I/O space */ + <0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* memory space */ + + pcie@0,0 { + device_type = "pci"; + reg = <0x0000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>; + ranges; + }; + + pcie@1,0 { + device_type = "pci"; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; + ranges; + }; + + pcie@2,0 { + device_type = "pci"; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>; + ranges; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt deleted file mode 100644 index 684227522267..000000000000 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt +++ /dev/null @@ -1,289 +0,0 @@ -MediaTek Gen2 PCIe controller - -Required properties: -- compatible: Should contain one of the following strings: - "mediatek,mt2701-pcie" - "mediatek,mt2712-pcie" - "mediatek,mt7622-pcie" - "mediatek,mt7623-pcie" - "mediatek,mt7629-pcie" - "airoha,en7523-pcie" -- device_type: Must be "pci" -- reg: Base addresses and lengths of the root ports. -- reg-names: Names of the above areas to use during resource lookup. -- #address-cells: Address representation for root ports (must be 3) -- #size-cells: Size representation for root ports (must be 2) -- clocks: Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: - Mandatory entries: - - sys_ckN :transaction layer and data link layer clock - Required entries for MT2701/MT7623: - - free_ck :for reference clock of PCIe subsys - Required entries for MT2712/MT7622: - - ahb_ckN :AHB slave interface operating clock for CSR access and RC - initiated MMIO access - Required entries for MT7622: - - axi_ckN :application layer MMIO channel operating clock - - aux_ckN :pe2_mac_bridge and pe2_mac_core operating clock when - pcie_mac_ck/pcie_pipe_ck is turned off - - obff_ckN :OBFF functional block operating clock - - pipe_ckN :LTSSM and PHY/MAC layer operating clock - where N starting from 0 to one less than the number of root ports. -- phys: List of PHY specifiers (used by generic PHY framework). -- phy-names : Must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the - number of PHYs as specified in *phys* property. -- power-domains: A phandle and power domain specifier pair to the power domain - which is responsible for collapsing and restoring power to the peripheral. -- bus-range: Range of bus numbers associated with this controller. -- ranges: Ranges for the PCI memory and I/O regions. - -Required properties for MT7623/MT2701: -- #interrupt-cells: Size representation for interrupts (must be 1) -- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties - Please refer to the standard PCI bus binding document for a more detailed - explanation. -- resets: Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names: Must be "pcie-rst0", "pcie-rst1", "pcie-rstN".. based on the - number of root ports. - -Required properties for MT2712/MT7622/MT7629: --interrupts: A list of interrupt outputs of the controller, must have one - entry for each PCIe port -- interrupt-names: Must include the following entries: - - "pcie_irq": The interrupt that is asserted when an MSI/INTX is received -- linux,pci-domain: PCI domain ID. Should be unique for each host controller - -In addition, the device tree node must have sub-nodes describing each -PCIe port interface, having the following mandatory properties: - -Required properties: -- device_type: Must be "pci" -- reg: Only the first four bytes are used to refer to the correct bus number - and device number. -- #address-cells: Must be 3 -- #size-cells: Must be 2 -- #interrupt-cells: Must be 1 -- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties - Please refer to the standard PCI bus binding document for a more detailed - explanation. -- ranges: Sub-ranges distributed from the PCIe controller node. An empty - property is sufficient. - -Examples for MT7623: - - hifsys: syscon@1a000000 { - compatible = "mediatek,mt7623-hifsys", - "mediatek,mt2701-hifsys", - "syscon"; - reg = <0 0x1a000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - pcie: pcie@1a140000 { - compatible = "mediatek,mt7623-pcie"; - device_type = "pci"; - reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */ - <0 0x1a142000 0 0x1000>, /* Port0 registers */ - <0 0x1a143000 0 0x1000>, /* Port1 registers */ - <0 0x1a144000 0 0x1000>; /* Port2 registers */ - reg-names = "subsys", "port0", "port1", "port2"; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0xf800 0 0 0>; - interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>, - <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>, - <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>; - clocks = <&topckgen CLK_TOP_ETHIF_SEL>, - <&hifsys CLK_HIFSYS_PCIE0>, - <&hifsys CLK_HIFSYS_PCIE1>, - <&hifsys CLK_HIFSYS_PCIE2>; - clock-names = "free_ck", "sys_ck0", "sys_ck1", "sys_ck2"; - resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>, - <&hifsys MT2701_HIFSYS_PCIE1_RST>, - <&hifsys MT2701_HIFSYS_PCIE2_RST>; - reset-names = "pcie-rst0", "pcie-rst1", "pcie-rst2"; - phys = <&pcie0_phy PHY_TYPE_PCIE>, <&pcie1_phy PHY_TYPE_PCIE>, - <&pcie2_phy PHY_TYPE_PCIE>; - phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; - bus-range = <0x00 0xff>; - ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000 /* I/O space */ - 0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* memory space */ - - pcie@0,0 { - reg = <0x0000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>; - ranges; - }; - - pcie@1,0 { - reg = <0x0800 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; - ranges; - }; - - pcie@2,0 { - reg = <0x1000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>; - ranges; - }; - }; - -Examples for MT2712: - - pcie1: pcie@112ff000 { - compatible = "mediatek,mt2712-pcie"; - device_type = "pci"; - reg = <0 0x112ff000 0 0x1000>; - reg-names = "port1"; - linux,pci-domain = <1>; - #address-cells = <3>; - #size-cells = <2>; - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pcie_irq"; - clocks = <&topckgen CLK_TOP_PE2_MAC_P1_SEL>, - <&pericfg CLK_PERI_PCIE1>; - clock-names = "sys_ck1", "ahb_ck1"; - phys = <&u3port1 PHY_TYPE_PCIE>; - phy-names = "pcie-phy1"; - bus-range = <0x00 0xff>; - ranges = <0x82000000 0 0x11400000 0x0 0x11400000 0 0x300000>; - status = "disabled"; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc1 0>, - <0 0 0 2 &pcie_intc1 1>, - <0 0 0 3 &pcie_intc1 2>, - <0 0 0 4 &pcie_intc1 3>; - pcie_intc1: interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - }; - - pcie0: pcie@11700000 { - compatible = "mediatek,mt2712-pcie"; - device_type = "pci"; - reg = <0 0x11700000 0 0x1000>; - reg-names = "port0"; - linux,pci-domain = <0>; - #address-cells = <3>; - #size-cells = <2>; - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "pcie_irq"; - clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>, - <&pericfg CLK_PERI_PCIE0>; - clock-names = "sys_ck0", "ahb_ck0"; - phys = <&u3port0 PHY_TYPE_PCIE>; - phy-names = "pcie-phy0"; - bus-range = <0x00 0xff>; - ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>; - status = "disabled"; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc0 0>, - <0 0 0 2 &pcie_intc0 1>, - <0 0 0 3 &pcie_intc0 2>, - <0 0 0 4 &pcie_intc0 3>; - pcie_intc0: interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - }; - -Examples for MT7622: - - pcie0: pcie@1a143000 { - compatible = "mediatek,mt7622-pcie"; - device_type = "pci"; - reg = <0 0x1a143000 0 0x1000>; - reg-names = "port0"; - linux,pci-domain = <0>; - #address-cells = <3>; - #size-cells = <2>; - interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>; - interrupt-names = "pcie_irq"; - clocks = <&pciesys CLK_PCIE_P0_MAC_EN>, - <&pciesys CLK_PCIE_P0_AHB_EN>, - <&pciesys CLK_PCIE_P0_AUX_EN>, - <&pciesys CLK_PCIE_P0_AXI_EN>, - <&pciesys CLK_PCIE_P0_OBFF_EN>, - <&pciesys CLK_PCIE_P0_PIPE_EN>; - clock-names = "sys_ck0", "ahb_ck0", "aux_ck0", - "axi_ck0", "obff_ck0", "pipe_ck0"; - - power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; - bus-range = <0x00 0xff>; - ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>; - status = "disabled"; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc0 0>, - <0 0 0 2 &pcie_intc0 1>, - <0 0 0 3 &pcie_intc0 2>, - <0 0 0 4 &pcie_intc0 3>; - pcie_intc0: interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - }; - - pcie1: pcie@1a145000 { - compatible = "mediatek,mt7622-pcie"; - device_type = "pci"; - reg = <0 0x1a145000 0 0x1000>; - reg-names = "port1"; - linux,pci-domain = <1>; - #address-cells = <3>; - #size-cells = <2>; - interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>; - interrupt-names = "pcie_irq"; - clocks = <&pciesys CLK_PCIE_P1_MAC_EN>, - /* designer has connect RC1 with p0_ahb clock */ - <&pciesys CLK_PCIE_P0_AHB_EN>, - <&pciesys CLK_PCIE_P1_AUX_EN>, - <&pciesys CLK_PCIE_P1_AXI_EN>, - <&pciesys CLK_PCIE_P1_OBFF_EN>, - <&pciesys CLK_PCIE_P1_PIPE_EN>; - clock-names = "sys_ck1", "ahb_ck1", "aux_ck1", - "axi_ck1", "obff_ck1", "pipe_ck1"; - - power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; - bus-range = <0x00 0xff>; - ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>; - status = "disabled"; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc1 0>, - <0 0 0 2 &pcie_intc1 1>, - <0 0 0 3 &pcie_intc1 2>, - <0 0 0 4 &pcie_intc1 3>; - pcie_intc1: interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; - }; diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie.yaml new file mode 100644 index 000000000000..0b8c78ec4f91 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie.yaml @@ -0,0 +1,438 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/mediatek-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PCIe controller on MediaTek SoCs + +maintainers: + - Christian Marangi <ansuelsmth@gmail.com> + +properties: + compatible: + oneOf: + - enum: + - airoha,an7583-pcie + - mediatek,mt2712-pcie + - mediatek,mt7622-pcie + - mediatek,mt7629-pcie + - items: + - const: airoha,en7523-pcie + - const: mediatek,mt7622-pcie + + reg: + maxItems: 1 + + reg-names: + enum: [ port0, port1 ] + + clocks: + minItems: 1 + maxItems: 6 + + clock-names: + minItems: 1 + items: + - enum: [ sys_ck0, sys_ck1 ] + - enum: [ ahb_ck0, ahb_ck1 ] + - enum: [ aux_ck0, aux_ck1 ] + - enum: [ axi_ck0, axi_ck1 ] + - enum: [ obff_ck0, obff_ck1 ] + - enum: [ pipe_ck0, pipe_ck1 ] + + resets: + maxItems: 1 + + reset-names: + const: pcie-rst1 + + interrupts: + maxItems: 1 + + interrupt-names: + const: pcie_irq + + phys: + maxItems: 1 + + phy-names: + enum: [ pcie-phy0, pcie-phy1 ] + + power-domains: + maxItems: 1 + + mediatek,pbus-csr: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to pbus-csr syscon + - description: offset of pbus-csr base address register + - description: offset of pbus-csr base address mask register + description: + Phandle with two arguments to the syscon node used to detect if + a given address is accessible on PCIe controller. + + '#interrupt-cells': + const: 1 + + interrupt-controller: + description: Interrupt controller node for handling legacy PCI interrupts. + type: object + properties: + '#address-cells': + const: 0 + '#interrupt-cells': + const: 1 + interrupt-controller: true + + required: + - '#address-cells' + - '#interrupt-cells' + - interrupt-controller + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - ranges + - clocks + - clock-names + - '#interrupt-cells' + - interrupts + - interrupt-names + - interrupt-controller + +allOf: + - $ref: /schemas/pci/pci-host-bridge.yaml# + + - if: + properties: + compatible: + const: airoha,an7583-pcie + then: + properties: + reg-names: + const: port1 + + clocks: + maxItems: 1 + + clock-names: + const: sys_ck1 + + phy-names: + const: pcie-phy1 + + power-domain: false + + required: + - resets + - reset-names + - phys + - phy-names + - mediatek,pbus-csr + + - if: + properties: + compatible: + const: mediatek,mt2712-pcie + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + minItems: 2 + maxItems: 2 + + reset: false + + reset-names: false + + power-domains: false + + mediatek,pbus-csr: false + + required: + - phys + - phy-names + + - if: + properties: + compatible: + const: mediatek,mt7622-pcie + then: + properties: + clocks: + minItems: 6 + + reset: false + + reset-names: false + + phys: false + + phy-names: false + + mediatek,pbus-csr: false + + required: + - power-domains + + - if: + properties: + compatible: + const: mediatek,mt7629-pcie + then: + properties: + clocks: + minItems: 6 + + reset: false + + reset-names: false + + mediatek,pbus-csr: false + + required: + - power-domains + + - if: + properties: + compatible: + contains: + const: airoha,en7523-pcie + then: + properties: + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + reset: false + + reset-names: false + + phys: false + + phy-names: false + + power-domain: false + + mediatek,pbus-csr: false + +unevaluatedProperties: false + +examples: + # MT2712 + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/phy/phy.h> + + soc_1 { + #address-cells = <2>; + #size-cells = <2>; + + pcie@112ff000 { + compatible = "mediatek,mt2712-pcie"; + device_type = "pci"; + reg = <0 0x112ff000 0 0x1000>; + reg-names = "port1"; + linux,pci-domain = <1>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "pcie_irq"; + clocks = <&topckgen>, /* CLK_TOP_PE2_MAC_P1_SEL */ + <&pericfg>; /* CLK_PERI_PCIE1 */ + clock-names = "sys_ck1", "ahb_ck1"; + phys = <&u3port1 PHY_TYPE_PCIE>; + phy-names = "pcie-phy1"; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x11400000 0x0 0x11400000 0 0x300000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc1 0>, + <0 0 0 2 &pcie_intc1 1>, + <0 0 0 3 &pcie_intc1 2>, + <0 0 0 4 &pcie_intc1 3>; + pcie_intc1: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + pcie@11700000 { + compatible = "mediatek,mt2712-pcie"; + device_type = "pci"; + reg = <0 0x11700000 0 0x1000>; + reg-names = "port0"; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "pcie_irq"; + clocks = <&topckgen>, /* CLK_TOP_PE2_MAC_P0_SEL */ + <&pericfg>; /* CLK_PERI_PCIE0 */ + clock-names = "sys_ck0", "ahb_ck0"; + phys = <&u3port0 PHY_TYPE_PCIE>; + phy-names = "pcie-phy0"; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc0 0>, + <0 0 0 2 &pcie_intc0 1>, + <0 0 0 3 &pcie_intc0 2>, + <0 0 0 4 &pcie_intc0 3>; + pcie_intc0: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + }; + + # MT7622 + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/power/mt7622-power.h> + + soc_2 { + #address-cells = <2>; + #size-cells = <2>; + + pcie@1a143000 { + compatible = "mediatek,mt7622-pcie"; + device_type = "pci"; + reg = <0 0x1a143000 0 0x1000>; + reg-names = "port0"; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "pcie_irq"; + clocks = <&pciesys>, /* CLK_PCIE_P0_MAC_EN */ + <&pciesys>, /* CLK_PCIE_P0_AHB_EN */ + <&pciesys>, /* CLK_PCIE_P0_AUX_EN */ + <&pciesys>, /* CLK_PCIE_P0_AXI_EN */ + <&pciesys>, /* CLK_PCIE_P0_OBFF_EN */ + <&pciesys>; /* CLK_PCIE_P0_PIPE_EN */ + clock-names = "sys_ck0", "ahb_ck0", "aux_ck0", + "axi_ck0", "obff_ck0", "pipe_ck0"; + + power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc0_1 0>, + <0 0 0 2 &pcie_intc0_1 1>, + <0 0 0 3 &pcie_intc0_1 2>, + <0 0 0 4 &pcie_intc0_1 3>; + pcie_intc0_1: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + pcie@1a145000 { + compatible = "mediatek,mt7622-pcie"; + device_type = "pci"; + reg = <0 0x1a145000 0 0x1000>; + reg-names = "port1"; + linux,pci-domain = <1>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "pcie_irq"; + clocks = <&pciesys>, /* CLK_PCIE_P1_MAC_EN */ + /* designer has connect RC1 with p0_ahb clock */ + <&pciesys>, /* CLK_PCIE_P0_AHB_EN */ + <&pciesys>, /* CLK_PCIE_P1_AUX_EN */ + <&pciesys>, /* CLK_PCIE_P1_AXI_EN */ + <&pciesys>, /* CLK_PCIE_P1_OBFF_EN */ + <&pciesys>; /* CLK_PCIE_P1_PIPE_EN */ + clock-names = "sys_ck1", "ahb_ck1", "aux_ck1", + "axi_ck1", "obff_ck1", "pipe_ck1"; + + power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc1_1 0>, + <0 0 0 2 &pcie_intc1_1 1>, + <0 0 0 3 &pcie_intc1_1 2>, + <0 0 0 4 &pcie_intc1_1 3>; + pcie_intc1_1: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + }; + + # AN7583 + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/en7523-clk.h> + + soc_3 { + #address-cells = <2>; + #size-cells = <2>; + + pcie@1fa92000 { + compatible = "airoha,an7583-pcie"; + device_type = "pci"; + linux,pci-domain = <1>; + #address-cells = <3>; + #size-cells = <2>; + + reg = <0x0 0x1fa92000 0x0 0x1670>; + reg-names = "port1"; + + clocks = <&scuclk EN7523_CLK_PCIE>; + clock-names = "sys_ck1"; + + phys = <&pciephy>; + phy-names = "pcie-phy1"; + + ranges = <0x02000000 0 0x24000000 0x0 0x24000000 0 0x4000000>; + + resets = <&scuclk>; /* AN7583_PCIE1_RST */ + reset-names = "pcie-rst1"; + + mediatek,pbus-csr = <&pbus_csr 0x8 0xc>; + + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "pcie_irq"; + bus-range = <0x00 0xff>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc1 0>, + <0 0 0 2 &pcie_intc1 1>, + <0 0 0 3 &pcie_intc1 2>, + <0 0 0 4 &pcie_intc1 3>; + + pcie_intc1_4: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/nxp,s32g-pcie.yaml b/Documentation/devicetree/bindings/pci/nxp,s32g-pcie.yaml new file mode 100644 index 000000000000..66a050028278 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/nxp,s32g-pcie.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/nxp,s32g-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32G2xxx/S32G3xxx PCIe Root Complex controller + +maintainers: + - Bogdan Hamciuc <bogdan.hamciuc@nxp.com> + - Ionut Vicovan <ionut.vicovan@nxp.com> + +description: + This PCIe controller is based on the Synopsys DesignWare PCIe IP. + The S32G SoC family has two PCIe controllers, which can be configured as + either Root Complex or Endpoint. + +properties: + compatible: + oneOf: + - enum: + - nxp,s32g2-pcie + - items: + - const: nxp,s32g3-pcie + - const: nxp,s32g2-pcie + + reg: + maxItems: 6 + + reg-names: + items: + - const: dbi + - const: dbi2 + - const: atu + - const: dma + - const: ctrl + - const: config + + interrupts: + minItems: 1 + maxItems: 2 + + interrupt-names: + items: + - const: msi + - const: dma + minItems: 1 + + pcie@0: + description: + Describe the S32G Root Port. + type: object + $ref: /schemas/pci/pci-pci-bridge.yaml# + + properties: + reg: + maxItems: 1 + + phys: + maxItems: 1 + + required: + - reg + - phys + + unevaluatedProperties: false + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - ranges + - pcie@0 + +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/phy/phy.h> + + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie@40400000 { + compatible = "nxp,s32g3-pcie", "nxp,s32g2-pcie"; + reg = <0x00 0x40400000 0x0 0x00001000>, /* dbi registers */ + <0x00 0x40420000 0x0 0x00001000>, /* dbi2 registers */ + <0x00 0x40460000 0x0 0x00001000>, /* atu registers */ + <0x00 0x40470000 0x0 0x00001000>, /* dma registers */ + <0x00 0x40481000 0x0 0x000000f8>, /* ctrl registers */ + <0x5f 0xffffe000 0x0 0x00002000>; /* config space */ + reg-names = "dbi", "dbi2", "atu", "dma", "ctrl", "config"; + dma-coherent; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = + <0x01000000 0x0 0x00000000 0x5f 0xfffe0000 0x0 0x00010000>, + <0x02000000 0x0 0x00000000 0x58 0x00000000 0x0 0x80000000>, + <0x02000000 0x1 0x00000000 0x59 0x00000000 0x6 0xfffe0000>; + + bus-range = <0x0 0xff>; + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi", "dma"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; + + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + device_type = "pci"; + phys = <&serdes0 PHY_TYPE_PCIE 0 0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml index 1868a10d5b10..baeb583e0bcd 100644 --- a/Documentation/devicetree/bindings/pci/pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/pci-ep.yaml @@ -11,7 +11,7 @@ description: | maintainers: - Kishon Vijay Abraham I <kishon@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> properties: $nodename: diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich3-axi-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich3-axi-common.yaml index 039eecdbd6aa..fe2e8beb5bab 100644 --- a/Documentation/devicetree/bindings/pci/plda,xpressrich3-axi-common.yaml +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich3-axi-common.yaml @@ -72,7 +72,7 @@ required: - reg-names - interrupts - msi-controller - - "#interrupt-cells" + - '#interrupt-cells' - interrupt-map-mask - interrupt-map diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml index ab2509ec1c4b..77f8faf54737 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml @@ -8,7 +8,7 @@ title: Qualcomm PCI Express Root Complex Common Properties maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> properties: reg: diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index ac3414203d38..bed9a40b186b 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm PCIe Endpoint Controller maintainers: - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> properties: compatible: diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml index bdddd4f499d1..1f2d098b8638 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml @@ -8,7 +8,7 @@ title: Qualcomm SA8255p based firmware managed and ECAM compliant PCIe Root Comp maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SA8255p SoC PCIe root complex controller is based on the Synopsys diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml index 19afe2a03409..63630a814f28 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml @@ -8,7 +8,7 @@ title: Qualcomm SA8775p PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SA8775p SoC PCIe root complex controller is based on the Synopsys @@ -78,6 +78,9 @@ properties: required: - interconnects - interconnect-names + - power-domains + - resets + - reset-names allOf: - $ref: qcom,pcie-common.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml index 4d0a91556603..1f942b3075f1 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc7280.yaml @@ -8,7 +8,7 @@ title: Qualcomm SC7280 PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SC7280 SoC PCIe root complex controller is based on the Synopsys @@ -76,6 +76,11 @@ properties: items: - const: pci +required: + - power-domains + - resets + - reset-names + allOf: - $ref: qcom,pcie-common.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml index 34a4d7b2c845..6a7c410c9fc3 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml @@ -8,7 +8,7 @@ title: Qualcomm SC8180x PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SC8180x SoC PCIe root complex controller is based on the Synopsys diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8280xp.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8280xp.yaml index 15ba2385eb73..bc0e71dc06a3 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8280xp.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8280xp.yaml @@ -8,7 +8,7 @@ title: Qualcomm SC8280XP PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SC8280XP SoC PCIe root complex controller is based on the Synopsys @@ -61,6 +61,9 @@ properties: required: - interconnects - interconnect-names + - power-domains + - resets + - reset-names allOf: - $ref: qcom,pcie-common.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml index 26b247a41785..6a5421e4f19d 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml @@ -8,7 +8,7 @@ title: Qualcomm SM8150 PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SM8150 SoC PCIe root complex controller is based on the Synopsys @@ -74,6 +74,11 @@ properties: items: - const: pci +required: + - power-domains + - resets + - reset-names + allOf: - $ref: qcom,pcie-common.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8250.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8250.yaml index af4dae68d508..adbeaa8f2c13 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8250.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8250.yaml @@ -8,7 +8,7 @@ title: Qualcomm SM8250 PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SM8250 SoC PCIe root complex controller is based on the Synopsys @@ -83,6 +83,11 @@ properties: items: - const: pci +required: + - power-domains + - resets + - reset-names + allOf: - $ref: qcom,pcie-common.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8350.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8350.yaml index dde3079adbb3..5744d5e969fb 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8350.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8350.yaml @@ -8,7 +8,7 @@ title: Qualcomm SM8350 PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SM8350 SoC PCIe root complex controller is based on the Synopsys @@ -73,6 +73,11 @@ properties: items: - const: pci +required: + - power-domains + - resets + - reset-names + allOf: - $ref: qcom,pcie-common.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml index 6e0a6d8f0ed0..28b8ffb74124 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml @@ -8,7 +8,7 @@ title: Qualcomm SM8450 PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SM8450 SoC PCIe root complex controller is based on the Synopsys @@ -77,6 +77,11 @@ properties: items: - const: pci +required: + - power-domains + - resets + - reset-names + allOf: - $ref: qcom,pcie-common.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml index 38b561e23c1f..3a94a9c1bb15 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml @@ -8,7 +8,7 @@ title: Qualcomm SM8550 PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm SM8550 SoC (and compatible) PCIe root complex controller is based on @@ -20,6 +20,7 @@ properties: - const: qcom,pcie-sm8550 - items: - enum: + - qcom,kaanapali-pcie - qcom,sar2130p-pcie - qcom,pcie-sm8650 - qcom,pcie-sm8750 @@ -83,6 +84,11 @@ properties: - const: pci # PCIe core reset - const: link_down # PCIe link down reset +required: + - power-domains + - resets + - reset-names + allOf: - $ref: qcom,pcie-common.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml index 61581ffbfb24..62c674ca0cf7 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml @@ -8,7 +8,7 @@ title: Qualcomm X1E80100 PCI Express Root Complex maintainers: - Bjorn Andersson <andersson@kernel.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: Qualcomm X1E80100 SoC (and compatible) PCIe root complex controller is based on @@ -73,6 +73,11 @@ properties: - const: pci # PCIe core reset - const: link_down # PCIe link down reset +required: + - power-domains + - resets + - reset-names + allOf: - $ref: qcom,pcie-common.yaml# diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 0e1808105a81..c61930441be0 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -8,7 +8,7 @@ title: Qualcomm PCI express root complex maintainers: - Bjorn Andersson <bjorn.andersson@linaro.org> - - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Manivannan Sadhasivam <mani@kernel.org> description: | Qualcomm PCIe root complex controller is based on the Synopsys DesignWare diff --git a/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml new file mode 100644 index 000000000000..d668782546a2 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml @@ -0,0 +1,249 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/renesas,r9a08g045-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G3S PCIe host controller + +maintainers: + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> + +description: + Renesas RZ/G3S PCIe host controller complies with PCIe Base Specification + 4.0 and supports up to 5 GT/s (Gen2). + +properties: + compatible: + const: renesas,r9a08g045-pcie # RZ/G3S + + reg: + maxItems: 1 + + interrupts: + items: + - description: System error interrupt + - description: System error on correctable error interrupt + - description: System error on non-fatal error interrupt + - description: System error on fatal error interrupt + - description: AXI error interrupt + - description: INTA interrupt + - description: INTB interrupt + - description: INTC interrupt + - description: INTD interrupt + - description: MSI interrupt + - description: Link bandwidth interrupt + - description: PME interrupt + - description: DMA interrupt + - description: PCIe event interrupt + - description: Message interrupt + - description: All interrupts + + interrupt-names: + items: + - description: serr + - description: ser_cor + - description: serr_nonfatal + - description: serr_fatal + - description: axi_err + - description: inta + - description: intb + - description: intc + - description: intd + - description: msi + - description: link_bandwidth + - description: pm_pme + - description: dma + - description: pcie_evt + - description: msg + - description: all + + interrupt-controller: true + + clocks: + items: + - description: System clock + - description: PM control clock + + clock-names: + items: + - description: aclk + - description: pm + + resets: + items: + - description: AXI2PCIe Bridge reset + - description: Data link layer/transaction layer reset + - description: Transaction layer (ACLK domain) reset + - description: Transaction layer (PCLK domain) reset + - description: Physical layer reset + - description: Configuration register reset + - description: Configuration register reset + + reset-names: + items: + - description: aresetn + - description: rst_b + - description: rst_gp_b + - description: rst_ps_b + - description: rst_rsm_b + - description: rst_cfg_b + - description: rst_load_b + + power-domains: + maxItems: 1 + + dma-ranges: + description: + A single range for the inbound memory region. + maxItems: 1 + + renesas,sysc: + description: | + System controller registers control and monitor various PCIe + functionalities. + + Control: + - transition to L1 state + - receiver termination settings + - RST_RSM_B signal + + Monitor: + - clkl1pm clock request state + - power off information in L2 state + - errors (fatal, non-fatal, correctable) + $ref: /schemas/types.yaml#/definitions/phandle + +patternProperties: + "^pcie@0,[0-0]$": + type: object + allOf: + - $ref: /schemas/pci/pci-pci-bridge.yaml# + + properties: + reg: + maxItems: 1 + + vendor-id: + const: 0x1912 + + device-id: + const: 0x0033 + + clocks: + items: + - description: Reference clock + + clock-names: + items: + - const: ref + + required: + - device_type + - vendor-id + - device-id + - clocks + - clock-names + + unevaluatedProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - interrupts + - interrupt-names + - interrupt-map + - interrupt-map-mask + - interrupt-controller + - power-domains + - "#address-cells" + - "#size-cells" + - "#interrupt-cells" + - renesas,sysc + +allOf: + - $ref: /schemas/pci/pci-host-bridge.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/r9a08g045-cpg.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie@11e40000 { + compatible = "renesas,r9a08g045-pcie"; + reg = <0 0x11e40000 0 0x10000>; + ranges = <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>; + /* Map all possible DRAM ranges (4 GB). */ + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 1 0x00000000>; + bus-range = <0x0 0xff>; + interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "serr", "serr_cor", "serr_nonfatal", + "serr_fatal", "axi_err", "inta", + "intb", "intc", "intd", "msi", + "link_bandwidth", "pm_pme", "dma", + "pcie_evt", "msg", "all"; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie 0 0 0 0>, /* INTA */ + <0 0 0 2 &pcie 0 0 0 1>, /* INTB */ + <0 0 0 3 &pcie 0 0 0 2>, /* INTC */ + <0 0 0 4 &pcie 0 0 0 3>; /* INTD */ + clocks = <&cpg CPG_MOD R9A08G045_PCI_ACLK>, + <&cpg CPG_MOD R9A08G045_PCI_CLKL1PM>; + clock-names = "aclk", "pm"; + resets = <&cpg R9A08G045_PCI_ARESETN>, + <&cpg R9A08G045_PCI_RST_B>, + <&cpg R9A08G045_PCI_RST_GP_B>, + <&cpg R9A08G045_PCI_RST_PS_B>, + <&cpg R9A08G045_PCI_RST_RSM_B>, + <&cpg R9A08G045_PCI_RST_CFG_B>, + <&cpg R9A08G045_PCI_RST_LOAD_B>; + reset-names = "aresetn", "rst_b", "rst_gp_b", "rst_ps_b", + "rst_rsm_b", "rst_cfg_b", "rst_load_b"; + power-domains = <&cpg>; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + renesas,sysc = <&sysc>; + + pcie@0,0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + ranges; + clocks = <&versa3 5>; + clock-names = "ref"; + device_type = "pci"; + vendor-id = <0x1912>; + device-id = <0x0033>; + #address-cells = <3>; + #size-cells = <2>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 6c6d828ce964..355c4a46bd31 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -22,6 +22,7 @@ properties: - const: rockchip,rk3568-pcie - items: - enum: + - rockchip,rk3528-pcie - rockchip,rk3562-pcie - rockchip,rk3576-pcie - rockchip,rk3588-pcie @@ -78,6 +79,7 @@ allOf: compatible: contains: enum: + - rockchip,rk3528-pcie - rockchip,rk3562-pcie - rockchip,rk3576-pcie then: @@ -89,6 +91,7 @@ allOf: compatible: contains: enum: + - rockchip,rk3528-pcie - rockchip,rk3562-pcie - rockchip,rk3576-pcie then: @@ -121,7 +124,6 @@ allOf: - const: dma2 - const: dma3 - unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml index 34594972d8db..6339a76499b2 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml @@ -115,11 +115,11 @@ properties: above for new bindings. oneOf: - description: See native 'dbi' clock for details - enum: [ pcie, pcie_apb_sys, aclk_dbi, reg ] + enum: [ pcie, pcie_apb_sys, aclk_dbi, reg, port ] - description: See native 'mstr/slv' clock for details enum: [ pcie_bus, pcie_inbound_axi, pcie_aclk, aclk_mst, aclk_slv ] - description: See native 'pipe' clock for details - enum: [ pcie_phy, pcie_phy_ref, link ] + enum: [ pcie_phy, pcie_phy_ref, link, general ] - description: See native 'aux' clock for details enum: [ pcie_aux ] - description: See native 'ref' clock for details. @@ -176,7 +176,7 @@ properties: - description: See native 'phy' reset for details enum: [ pciephy, link ] - description: See native 'pwr' reset for details - enum: [ turnoff ] + enum: [ turnoff, port ] phys: description: diff --git a/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml b/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml new file mode 100644 index 000000000000..c4c00b5fcdc0 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/spacemit,k1-pcie-host.yaml @@ -0,0 +1,157 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/spacemit,k1-pcie-host.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 PCI Express Host Controller + +maintainers: + - Alex Elder <elder@riscstar.com> + +description: > + The SpacemiT K1 SoC PCIe host controller is based on the Synopsys DesignWare + PCIe IP. The controller uses the DesignWare built-in MSI interrupt + controller, and supports 256 MSIs. + +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + +properties: + compatible: + const: spacemit,k1-pcie + + reg: + items: + - description: DesignWare PCIe registers + - description: ATU address space + - description: PCIe configuration space + - description: Link control registers + + reg-names: + items: + - const: dbi + - const: atu + - const: config + - const: link + + clocks: + items: + - description: DWC PCIe Data Bus Interface (DBI) clock + - description: DWC PCIe application AXI-bus master interface clock + - description: DWC PCIe application AXI-bus slave interface clock + + clock-names: + items: + - const: dbi + - const: mstr + - const: slv + + resets: + items: + - description: DWC PCIe Data Bus Interface (DBI) reset + - description: DWC PCIe application AXI-bus master interface reset + - description: DWC PCIe application AXI-bus slave interface reset + + reset-names: + items: + - const: dbi + - const: mstr + - const: slv + + interrupts: + items: + - description: Interrupt used for MSIs + + interrupt-names: + const: msi + + spacemit,apmu: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A phandle that refers to the APMU system controller, whose regmap is + used in managing resets and link state, along with and offset of its + reset control register. + items: + - items: + - description: phandle to APMU system controller + - description: register offset + +patternProperties: + '^pcie@': + type: object + $ref: /schemas/pci/pci-pci-bridge.yaml# + + properties: + phys: + maxItems: 1 + + vpcie3v3-supply: + description: + A phandle for 3.3v regulator to use for PCIe + + required: + - phys + - vpcie3v3-supply + + unevaluatedProperties: false + +required: + - clocks + - clock-names + - resets + - reset-names + - interrupts + - interrupt-names + - spacemit,apmu + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/spacemit,k1-syscon.h> + pcie@ca400000 { + device_type = "pci"; + compatible = "spacemit,k1-pcie"; + reg = <0xca400000 0x00001000>, + <0xca700000 0x0001ff24>, + <0x9f000000 0x00002000>, + <0xc0c20000 0x00001000>; + reg-names = "dbi", + "atu", + "config", + "link"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x01000000 0x0 0x00000000 0x9f002000 0x0 0x00100000>, + <0x02000000 0x0 0x90000000 0x90000000 0x0 0x0f000000>; + interrupts = <142>; + interrupt-names = "msi"; + clocks = <&syscon_apmu CLK_PCIE1_DBI>, + <&syscon_apmu CLK_PCIE1_MASTER>, + <&syscon_apmu CLK_PCIE1_SLAVE>; + clock-names = "dbi", + "mstr", + "slv"; + resets = <&syscon_apmu RESET_PCIE1_DBI>, + <&syscon_apmu RESET_PCIE1_MASTER>, + <&syscon_apmu RESET_PCIE1_SLAVE>; + reset-names = "dbi", + "mstr", + "slv"; + pinctrl-names = "default"; + pinctrl-0 = <&pcie1_3_cfg>; + spacemit,apmu = <&syscon_apmu 0x3d4>; + + pcie@0 { + device_type = "pci"; + compatible = "pciclass,0604"; + reg = <0x0 0x0 0x0 0x0 0x0>; + bus-range = <0x01 0xff>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + phys = <&pcie1_phy>; + vpcie3v3-supply = <&pcie_vcc_3v3>; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml index 5f432452c815..33c80626e8ec 100644 --- a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml @@ -16,7 +16,6 @@ properties: compatible: const: starfive,jh7110-pcie - reg: maxItems: 2 diff --git a/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml new file mode 100644 index 000000000000..fae466064780 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml @@ -0,0 +1,179 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/toshiba,tc9563.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba TC9563 PCIe switch + +maintainers: + - Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> + +description: | + Toshiba TC9563 PCIe switch has one upstream and three downstream ports. + The 3rd downstream port has integrated endpoint device of Ethernet MAC. + Other two downstream ports are supposed to connect to external device. + + The TC9563 PCIe switch can be configured through I2C interface before + PCIe link is established to change FTS, ASPM related entry delays, + tx amplitude etc for better power efficiency and functionality. + +properties: + compatible: + enum: + - pci1179,0623 + + reg: + maxItems: 1 + + resx-gpios: + maxItems: 1 + description: + GPIO controlling the RESX# pin. + + vdd18-supply: true + + vdd09-supply: true + + vddc-supply: true + + vddio1-supply: true + + vddio2-supply: true + + vddio18-supply: true + + i2c-parent: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A phandle to the parent I2C node and the slave address of the device + used to configure tc9563 to change FTS, tx amplitude etc. + items: + - description: Phandle to the I2C controller node + - description: I2C slave address + +patternProperties: + "^pcie@[1-3],0$": + description: + child nodes describing the internal downstream ports of + the tc9563 switch. + type: object + allOf: + - $ref: "#/$defs/tc9563-node" + - $ref: /schemas/pci/pci-pci-bridge.yaml# + unevaluatedProperties: false + +$defs: + tc9563-node: + type: object + + properties: + toshiba,tx-amplitude-microvolt: + description: + Change Tx Margin setting for low power consumption. + + toshiba,no-dfe-support: + type: boolean + description: + Disable DFE (Decision Feedback Equalizer), which mitigates + intersymbol interference and some reflections caused by + impedance mismatches. + +required: + - resx-gpios + - vdd18-supply + - vdd09-supply + - vddc-supply + - vddio1-supply + - vddio2-supply + - vddio18-supply + - i2c-parent + +allOf: + - $ref: "#/$defs/tc9563-node" + - $ref: /schemas/pci/pci-bus-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + + pcie { + #address-cells = <3>; + #size-cells = <2>; + + pcie@0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + bus-range = <0x01 0xff>; + + pcie@0,0 { + compatible = "pci1179,0623"; + + reg = <0x10000 0x0 0x0 0x0 0x0>; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges; + bus-range = <0x02 0xff>; + + i2c-parent = <&qup_i2c 0x77>; + + vdd18-supply = <&vdd>; + vdd09-supply = <&vdd>; + vddc-supply = <&vdd>; + vddio1-supply = <&vdd>; + vddio2-supply = <&vdd>; + vddio18-supply = <&vdd>; + + resx-gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + + pcie@1,0 { + compatible = "pciclass,0604"; + reg = <0x20800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + bus-range = <0x03 0xff>; + + toshiba,no-dfe-support; + }; + + pcie@2,0 { + compatible = "pciclass,0604"; + reg = <0x21000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + bus-range = <0x04 0xff>; + }; + + pcie@3,0 { + compatible = "pciclass,0604"; + reg = <0x21800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + bus-range = <0x05 0xff>; + + toshiba,tx-amplitude-microvolt = <10>; + + ethernet@0,0 { + reg = <0x50000 0x0 0x0 0x0 0x0>; + }; + + ethernet@0,1 { + reg = <0x50100 0x0 0x0 0x0 0x0>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pci/versatile.yaml b/Documentation/devicetree/bindings/pci/versatile.yaml index 294c7cd84b37..d30b8849db91 100644 --- a/Documentation/devicetree/bindings/pci/versatile.yaml +++ b/Documentation/devicetree/bindings/pci/versatile.yaml @@ -90,5 +90,4 @@ examples: <0x0000 0 0 4 &sic 28>; }; - ... diff --git a/Documentation/devicetree/bindings/phy/motorola,cpcap-usb-phy.yaml b/Documentation/devicetree/bindings/phy/motorola,cpcap-usb-phy.yaml index 0febd04a61f4..dd345cbd0a0b 100644 --- a/Documentation/devicetree/bindings/phy/motorola,cpcap-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/motorola,cpcap-usb-phy.yaml @@ -67,8 +67,8 @@ properties: mode-gpios: description: Optional GPIOs for configuring alternate modes items: - - description: "mode selection GPIO #0" - - description: "mode selection GPIO #1" + - description: mode selection GPIO#0 + - description: mode selection GPIO#1 required: - compatible diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml index a1b55168e050..863a1a446739 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml @@ -35,7 +35,6 @@ properties: - qcom,sm8350-qmp-usb3-uni-phy - qcom,x1e80100-qmp-usb3-uni-phy - reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm21664-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm21664-pinctrl.yaml index 1283a588416d..a2e609b066ee 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm21664-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm21664-pinctrl.yaml @@ -116,7 +116,6 @@ patternProperties: input-schmitt-enable: false input-schmitt-disable: false - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx9-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx9-pinctrl.yaml index a438db8884f2..96e7b6995273 100644 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx9-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx9-pinctrl.yaml @@ -58,7 +58,6 @@ patternProperties: - description: | "pad_setting" indicates the pad configuration value to be applied. - required: - fsl,pins diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,ap806-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,ap806-pinctrl.yaml new file mode 100644 index 000000000000..00a7e358a8c9 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,ap806-pinctrl.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/marvell,ap806-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell AP806 pin controller + +maintainers: + - Gregory Clement <gregory.clement@bootlin.com> + - Miquel Raynal <miquel.raynal@bootlin.com> + +properties: + compatible: + const: marvell,ap806-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '-pins$': + type: object + additionalProperties: false + + properties: + marvell,function: + $ref: /schemas/types.yaml#/definitions/string + description: + Indicates the function to select. + enum: [ gpio, i2c0, sdio, spi0, uart0, uart1 ] + + marvell,pins: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Array of MPP pins to be used for the given function. + minItems: 1 + maxItems: 20 + items: + enum: [ + mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, mpp10, + mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, mpp19 + ] + +allOf: + - $ref: pinctrl.yaml# + +required: + - compatible + +additionalProperties: false + +examples: + - | + pinctrl { + compatible = "marvell,ap806-pinctrl"; + + uart0_pins: uart0-pins { + marvell,pins = "mpp11", "mpp19"; + marvell,function = "uart0"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-7k-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,armada-7k-pinctrl.yaml new file mode 100644 index 000000000000..88910ad170e5 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-7k-pinctrl.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/marvell,armada-7k-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 7K/8K pin controller + +maintainers: + - Gregory Clement <gregory.clement@bootlin.com> + - Miquel Raynal <miquel.raynal@bootlin.com> + +properties: + compatible: + enum: + - marvell,armada-7k-pinctrl + - marvell,armada-8k-cpm-pinctrl + - marvell,armada-8k-cps-pinctrl + - marvell,cp115-standalone-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '-pins(-.+)?$': + type: object + additionalProperties: false + + properties: + marvell,function: + $ref: /schemas/types.yaml#/definitions/string + description: + Indicates the function to select. + enum: [ + au, dev, ge, ge0, ge1, gpio, i2c0, i2c1, led, link, mii, mss_gpio0, + mss_gpio1, mss_gpio2, mss_gpio3, mss_gpio4, mss_gpio5, mss_gpio6, + mss_gpio7, mss_i2c, mss_spi, mss_uart, nf, pcie, pcie0, pcie1, pcie2, + ptp, rei, sata0, sata1, sdio, sdio_cd, sdio_wp, sei, spi0, spi1, + synce1, synce2, tdm, uart0, uart1, uart2, uart3, wakeup, xg + ] + + marvell,pins: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Array of MPP pins to be used for the given function. + minItems: 1 + maxItems: 63 + items: + pattern: '^mpp([1-5]?[0-9]|6[0-2])$' + +allOf: + - $ref: pinctrl.yaml# + +required: + - compatible + +additionalProperties: false + +examples: + - | + pinctrl { + compatible = "marvell,armada-7k-pinctrl"; + + nand_pins: nand-pins { + marvell,pins = + "mpp15", "mpp16", "mpp17", "mpp18", + "mpp19", "mpp20", "mpp21", "mpp22", + "mpp23", "mpp24", "mpp25", "mpp26", + "mpp27"; + marvell,function = "dev"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml index 0df4e114fdd6..fa47732d7cef 100644 --- a/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml @@ -18,7 +18,7 @@ description: | properties: $nodename: - pattern: "^gpio@[0-9a-f]+$" + pattern: '^gpio@[0-9a-f]+$' compatible: enum: @@ -26,10 +26,10 @@ properties: - mscc,ocelot-sgpio - mscc,luton-sgpio - "#address-cells": + '#address-cells': const: 1 - "#size-cells": + '#size-cells': const: 0 reg: @@ -76,7 +76,7 @@ properties: - const: switch patternProperties: - "^gpio@[0-1]$": + '^gpio@[0-1]$': type: object properties: compatible: @@ -132,8 +132,8 @@ required: - reg - clocks - microchip,sgpio-port-ranges - - "#address-cells" - - "#size-cells" + - '#address-cells' + - '#size-cells' examples: - | diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml index 23300606547c..96635b2f6a27 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml @@ -8,7 +8,7 @@ title: Qualcomm IPQ5018 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm IPQ5018 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml index e571cd64418f..22685c479983 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml @@ -8,7 +8,7 @@ title: Qualcomm IPQ5332 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: | Top Level Mode Multiplexer pin controller in Qualcomm IPQ5332 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml index 6f90dbbdbdcc..40def3ac3bf7 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm IPQ8074 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm IPQ8074 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml index bca903b5da6d..7afec315b63e 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml @@ -8,7 +8,7 @@ title: Qualcomm Technologies, Inc. IPQ9574 TLMM block maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm IPQ9574 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-common.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-common.yaml index 3b5045730471..619341dd637c 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-common.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-common.yaml @@ -9,7 +9,7 @@ title: Qualcomm SoC LPASS LPI TLMM Common Properties maintainers: - Bjorn Andersson <andersson@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Common properties for the Top Level Mode Multiplexer pin controllers in the diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml index 61f5be21f30c..203ad69e99e8 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm MSM8660 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm MSM8660 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml index 904af87f9eaf..9bf098cf18ee 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm MSM8916 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm MSM8916 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml index 46618740bd31..435f0dc7a82e 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm MSM8960 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm MSM8960 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml index 840fdaabde12..a9aff442824c 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm MSM8974 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm MSM8974 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml index d4391c194ff7..501329bff905 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm MSM8976 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm MSM8976 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml index fa90981db40b..2ec10908d556 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm MSM8994 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm MSM8994 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml index c5010c175b23..496f38009c7d 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm MSM8996 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm MSM8996 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml index bcaa231adaf7..3b098a226a67 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm MSM8998 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm MSM8998 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index 5e6dfcc3fe9b..6632bcd037ba 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -424,13 +424,13 @@ allOf: patternProperties: '-state$': oneOf: - - $ref: "#/$defs/qcom-pmic-gpio-state" + - $ref: '#/$defs/qcom-pmic-gpio-state' - patternProperties: - "(pinconf|-pins)$": - $ref: "#/$defs/qcom-pmic-gpio-state" + '(pinconf|-pins)$': + $ref: '#/$defs/qcom-pmic-gpio-state' additionalProperties: false - "-hog(-[0-9]+)?$": + '-hog(-[0-9]+)?$': type: object required: - gpio-hog @@ -503,7 +503,7 @@ $defs: - gpio1-gpio12 for pmxr2230 items: - pattern: "^gpio([0-9]+)$" + pattern: '^gpio([0-9]+)$' function: items: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml index 9364ae05f3e6..daf4c1c03712 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml @@ -74,10 +74,10 @@ required: patternProperties: '-state$': oneOf: - - $ref: "#/$defs/qcom-pmic-mpp-state" + - $ref: '#/$defs/qcom-pmic-mpp-state' - patternProperties: '-pins$': - $ref: "#/$defs/qcom-pmic-mpp-state" + $ref: '#/$defs/qcom-pmic-mpp-state' additionalProperties: false $defs: @@ -100,7 +100,7 @@ $defs: - mpp1-mpp4 for pma8084 items: - pattern: "^mpp([0-9]+)$" + pattern: '^mpp([0-9]+)$' function: items: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml index 4009501b3414..91b8dcec3f08 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm QCS404 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm QCS404 SoC. @@ -142,7 +142,6 @@ examples: interrupt-controller; #interrupt-cells = <2>; - blsp1-i2c1-default-state { pins = "gpio24", "gpio25"; function = "blsp_i2c1"; diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml index 5606f2136ad1..ec0bf4fdfa4f 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm SC7180 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm SC7180 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml index a00cb43df144..80627a1ad663 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm SDM630 and SDM660 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm SDM630 and SDM660 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml index 0f331844608c..4fcac2e55b55 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm SDM845 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm SDM845 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml index f4cf2ce86fcd..d3e4926034a7 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml @@ -66,7 +66,6 @@ $defs: Specify the alternative function to be configured for the specified pins. - allOf: - $ref: qcom,lpass-lpi-common.yaml# diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml index ddeaeaa9a450..5a57a59cc1e5 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml @@ -88,7 +88,6 @@ $defs: uim2_present, uim2_reset, unused1, unused2, usb_phy, vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1, wsa_clk, wsa_data ] - required: - pins diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml index bdb7ed4be026..c4542e2d7108 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml @@ -8,7 +8,7 @@ title: Qualcomm SM8150 TLMM pin controller maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Top Level Mode Multiplexer pin controller in Qualcomm SM8150 SoC. diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml index 9d782f910b31..46aec0713775 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SM8350 SoC LPASS LPI TLMM maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml index bf4a72facae1..89821871c606 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SM8550 SoC LPASS LPI TLMM maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml index e90a5274647d..74df912e60ad 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SM8650 SoC LPASS LPI TLMM maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml index cfe004573366..075f3abdfbec 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml @@ -129,7 +129,7 @@ additionalProperties: - type: object additionalProperties: - $ref: "#/additionalProperties/anyOf/0" + $ref: '#/additionalProperties/anyOf/0' examples: - | diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml index 2bd7d47d0fdb..8203c3c46cc7 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml @@ -65,7 +65,6 @@ patternProperties: - '#gpio-cells' - gpio-ranges - additionalProperties: anyOf: - type: object @@ -118,7 +117,7 @@ additionalProperties: - type: object additionalProperties: - $ref: "#/additionalProperties/anyOf/0" + $ref: '#/additionalProperties/anyOf/0' examples: - | @@ -150,7 +149,6 @@ examples: pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>; }; - /* * I2c master: both SDA and SCL pins need bi-directional operations * Pin #4 on port #1 is configured as alternate function #1. @@ -162,7 +160,6 @@ examples: pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>; }; - /* * Multi-function timer input and output compare pins. */ diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml index 5156d54b240b..00c05243b9a4 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml @@ -135,7 +135,7 @@ additionalProperties: - type: object additionalProperties: - $ref: "#/additionalProperties/anyOf/0" + $ref: '#/additionalProperties/anyOf/0' allOf: - $ref: pinctrl.yaml# diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml index 5fa5d31f8866..88b2fa5e684d 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml @@ -88,7 +88,7 @@ additionalProperties: - type: object additionalProperties: - $ref: "#/additionalProperties/anyOf/0" + $ref: '#/additionalProperties/anyOf/0' allOf: - $ref: pinctrl.yaml# diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml index f3258f2fd3a4..3f14eab01c54 100644 --- a/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml @@ -32,7 +32,6 @@ description: | | | | | | | ------- UART0 UART1 -- - The big MUX in the diagram only has 7 different ways of mapping peripherals on the left to pins on the right. StarFive calls the 7 configurations "signal groups". diff --git a/Documentation/devicetree/bindings/power/actions,owl-sps.txt b/Documentation/devicetree/bindings/power/actions,owl-sps.txt deleted file mode 100644 index a3571937b019..000000000000 --- a/Documentation/devicetree/bindings/power/actions,owl-sps.txt +++ /dev/null @@ -1,21 +0,0 @@ -Actions Semi Owl Smart Power System (SPS) - -Required properties: -- compatible : "actions,s500-sps" for S500 - "actions,s700-sps" for S700 - "actions,s900-sps" for S900 -- reg : Offset and length of the register set for the device. -- #power-domain-cells : Must be 1. - See macros in: - include/dt-bindings/power/owl-s500-powergate.h for S500 - include/dt-bindings/power/owl-s700-powergate.h for S700 - include/dt-bindings/power/owl-s900-powergate.h for S900 - - -Example: - - sps: power-controller@b01b0100 { - compatible = "actions,s500-sps"; - reg = <0xb01b0100 0x100>; - #power-domain-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/power/actions,s500-sps.yaml b/Documentation/devicetree/bindings/power/actions,s500-sps.yaml new file mode 100644 index 000000000000..bb942817b3db --- /dev/null +++ b/Documentation/devicetree/bindings/power/actions,s500-sps.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/actions,s500-sps.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl Smart Power System (SPS) + +maintainers: + - Andreas Färber <afaerber@suse.de> + - Manivannan Sadhasivam <mani@kernel.org> + +properties: + compatible: + enum: + - actions,s500-sps + - actions,s700-sps + - actions,s900-sps + + reg: + maxItems: 1 + + '#power-domain-cells': + const: 1 + +required: + - compatible + - reg + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + power-controller@b01b0100 { + compatible = "actions,s500-sps"; + reg = <0xb01b0100 0x100>; + #power-domain-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml b/Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml new file mode 100644 index 000000000000..b9e43abaf8a4 --- /dev/null +++ b/Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/mediatek,mt8196-gpufreq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MFlexGraphics Power and Frequency Controller + +maintainers: + - Nicolas Frattaroli <nicolas.frattaroli@collabora.com> + +description: + A special-purpose embedded MCU to control power and frequency of GPU devices + using MediaTek Flexible Graphics integration hardware. + +properties: + $nodename: + pattern: '^power-controller@[a-f0-9]+$' + + compatible: + enum: + - mediatek,mt8196-gpufreq + + reg: + items: + - description: GPR memory area + - description: RPC memory area + - description: SoC variant ID register + + reg-names: + items: + - const: gpr + - const: rpc + - const: hw-revision + + clocks: + items: + - description: main clock of the embedded controller (EB) + - description: core PLL + - description: stack 0 PLL + - description: stack 1 PLL + + clock-names: + items: + - const: eb + - const: core + - const: stack0 + - const: stack1 + + mboxes: + items: + - description: FastDVFS events + - description: frequency control + - description: sleep control + - description: timer control + - description: frequency hopping control + - description: hardware voter control + - description: FastDVFS control + + mbox-names: + items: + - const: fast-dvfs-event + - const: gpufreq + - const: sleep + - const: timer + - const: fhctl + - const: ccf + - const: fast-dvfs + + memory-region: + items: + - description: phandle to the GPUEB shared memory + + "#clock-cells": + const: 1 + + "#power-domain-cells": + const: 0 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - mboxes + - mbox-names + - memory-region + - "#clock-cells" + - "#power-domain-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mediatek,mt8196-clock.h> + + power-controller@4b09fd00 { + compatible = "mediatek,mt8196-gpufreq"; + reg = <0x4b09fd00 0x80>, + <0x4b800000 0x1000>, + <0x4b860128 0x4>; + reg-names = "gpr", "rpc", "hw-revision"; + clocks = <&topckgen CLK_TOP_MFG_EB>, + <&mfgpll CLK_MFG_AO_MFGPLL>, + <&mfgpll_sc0 CLK_MFGSC0_AO_MFGPLL_SC0>, + <&mfgpll_sc1 CLK_MFGSC1_AO_MFGPLL_SC1>; + clock-names = "eb", "core", "stack0", "stack1"; + mboxes = <&gpueb_mbox 0>, <&gpueb_mbox 1>, <&gpueb_mbox 2>, + <&gpueb_mbox 3>, <&gpueb_mbox 4>, <&gpueb_mbox 5>, + <&gpueb_mbox 7>; + mbox-names = "fast-dvfs-event", "gpufreq", "sleep", "timer", "fhctl", + "ccf", "fast-dvfs"; + memory-region = <&gpueb_shared_memory>; + #clock-cells = <1>; + #power-domain-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index 500d98921581..f8a13928f615 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -33,6 +33,9 @@ properties: - mediatek,mt8188-power-controller - mediatek,mt8192-power-controller - mediatek,mt8195-power-controller + - mediatek,mt8196-hwv-hfrp-power-controller + - mediatek,mt8196-hwv-scp-power-controller + - mediatek,mt8196-power-controller - mediatek,mt8365-power-controller '#power-domain-cells': @@ -157,6 +160,7 @@ allOf: contains: enum: - mediatek,mt8183-power-controller + - mediatek,mt8196-power-controller then: properties: access-controllers: diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml index af5fef872529..27af5b8aa134 100644 --- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml +++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml @@ -18,6 +18,7 @@ properties: oneOf: - enum: - qcom,glymur-rpmhpd + - qcom,kaanapali-rpmhpd - qcom,mdm9607-rpmpd - qcom,milos-rpmhpd - qcom,msm8226-rpmpd diff --git a/Documentation/devicetree/bindings/power/renesas,sysc-rmobile.yaml b/Documentation/devicetree/bindings/power/renesas,sysc-rmobile.yaml index fba6914ec40d..948a9da111df 100644 --- a/Documentation/devicetree/bindings/power/renesas,sysc-rmobile.yaml +++ b/Documentation/devicetree/bindings/power/renesas,sysc-rmobile.yaml @@ -45,7 +45,7 @@ properties: const: 0 additionalProperties: - $ref: "#/$defs/pd-node" + $ref: '#/$defs/pd-node' required: - compatible @@ -83,7 +83,7 @@ $defs: - '#power-domain-cells' additionalProperties: - $ref: "#/$defs/pd-node" + $ref: '#/$defs/pd-node' examples: - | diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml index a884e49c995f..b41db576f95d 100644 --- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -46,6 +46,7 @@ properties: - rockchip,rk3576-power-controller - rockchip,rk3588-power-controller - rockchip,rv1126-power-controller + - rockchip,rv1126b-power-controller "#power-domain-cells": const: 1 @@ -126,6 +127,7 @@ $defs: "include/dt-bindings/power/rk3568-power.h" "include/dt-bindings/power/rk3588-power.h" "include/dt-bindings/power/rockchip,rv1126-power.h" + "include/dt-bindings/power/rockchip,rv1126b-power-controller.h" clocks: minItems: 1 diff --git a/Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml b/Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml index 4c74cc78729e..3e8689019251 100644 --- a/Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml +++ b/Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml @@ -21,7 +21,6 @@ properties: description: Maximum CHGIN regulation voltage in uV. enum: [ 5500000, 6500000, 11000000, 14500000 ] - usb-otg-vbus-regulator: type: object description: OTG boost regulator. diff --git a/Documentation/devicetree/bindings/power/supply/richtek,rt9756.yaml b/Documentation/devicetree/bindings/power/supply/richtek,rt9756.yaml new file mode 100644 index 000000000000..a88bf6cd1927 --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/richtek,rt9756.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/supply/richtek,rt9756.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT9756 Smart Cap Divider Charger + +maintainers: + - ChiYuan Huang <cy_huang@richtek.com> + +description: | + The RT9756/RT9757 is a high efficiency and high charge current charger. + + The efficiency is up to 98.2% when VBAT = 4V, IBAT = 2A in DIV2 mode and 99.1% + when VBAT=4V, IBAT=1A in bypass mode. The maximum charger current is up to 8A + in DIV2 mode and 5A in bypass mode. The device integrates smart cap divider + topology, direct charging mode, external over-voltage protection control, an + input reverse blocking NFET and 2-way regulation, a dual phase charge pump + core, 8-Channel high speed ADCs and USB BC 1.2 detection. + + RT9770 is almost the same with RT9756/57, only BC 1.2 detection function is + removed to shrink the die size. + +allOf: + - $ref: power-supply.yaml# + +properties: + compatible: + oneOf: + - enum: + - richtek,rt9756 + - richtek,rt9770 + - items: + - enum: + - richtek,rt9757 + - const: richtek,rt9756 + + reg: + maxItems: 1 + + wakeup-source: true + + interrupts: + maxItems: 1 + + shunt-resistor-micro-ohms: + description: Battery current sense resistor mounted. + default: 2000 + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + charger@6f { + compatible = "richtek,rt9756"; + reg = <0x6f>; + wakeup-source; + interrupts-extended = <&gpio_intc 32 IRQ_TYPE_EDGE_FALLING>; + shunt-resistor-micro-ohms = <5000>; + }; + }; diff --git a/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml b/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml index 994fac12c8da..4f19744844e9 100644 --- a/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml +++ b/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml @@ -65,7 +65,6 @@ properties: - const: vbus_v - const: usb_charger_c - required: - compatible - monitored-battery diff --git a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml index 1b192e197b11..1197858e431f 100644 --- a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml @@ -55,7 +55,6 @@ properties: resets: maxItems: 1 - allOf: - $ref: pwm.yaml# diff --git a/Documentation/devicetree/bindings/pwm/thead,th1520-pwm.yaml b/Documentation/devicetree/bindings/pwm/thead,th1520-pwm.yaml new file mode 100644 index 000000000000..855aec59ac53 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/thead,th1520-pwm.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/thead,th1520-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-HEAD TH1520 PWM controller + +maintainers: + - Michal Wilczynski <m.wilczynski@samsung.com> + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: thead,th1520-pwm + + reg: + maxItems: 1 + + clocks: + items: + - description: SoC PWM clock + + "#pwm-cells": + const: 3 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/thead,th1520-clk-ap.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + pwm@ffec01c000 { + compatible = "thead,th1520-pwm"; + reg = <0xff 0xec01c000 0x0 0x4000>; + clocks = <&clk CLK_PWM>; + #pwm-cells = <3>; + }; + }; diff --git a/Documentation/devicetree/bindings/regulator/da9211.txt b/Documentation/devicetree/bindings/regulator/da9211.txt deleted file mode 100644 index eb871447d508..000000000000 --- a/Documentation/devicetree/bindings/regulator/da9211.txt +++ /dev/null @@ -1,205 +0,0 @@ -* Dialog Semiconductor DA9211/DA9212/DA9213/DA9223/DA9214/DA9224/DA9215/DA9225 - Voltage Regulator - -Required properties: -- compatible: "dlg,da9211" or "dlg,da9212" or "dlg,da9213" or "dlg,da9223" - or "dlg,da9214" or "dlg,da9224" or "dlg,da9215" or "dlg,da9225" -- reg: I2C slave address, usually 0x68. -- interrupts: the interrupt outputs of the controller -- regulators: A node that houses a sub-node for each regulator within the - device. Each sub-node is identified using the node's name, with valid - values listed below. The content of each sub-node is defined by the - standard binding for regulators; see regulator.txt. - BUCKA and BUCKB. - -Optional properties: -- enable-gpios: platform gpio for control of BUCKA/BUCKB. -- Any optional property defined in regulator.txt - - regulator-initial-mode and regulator-allowed-modes may be specified using - mode values from dt-bindings/regulator/dlg,da9211-regulator.h - -Example 1) DA9211 - pmic: da9211@68 { - compatible = "dlg,da9211"; - reg = <0x68>; - interrupts = <3 27>; - - regulators { - BUCKA { - regulator-name = "VBUCKA"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <2000000>; - regulator-max-microamp = <5000000>; - enable-gpios = <&gpio 27 0>; - regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC - DA9211_BUCK_MODE_AUTO>; - }; - }; - }; - -Example 2) DA9212 - pmic: da9212@68 { - compatible = "dlg,da9212"; - reg = <0x68>; - interrupts = <3 27>; - - regulators { - BUCKA { - regulator-name = "VBUCKA"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <2000000>; - regulator-max-microamp = <5000000>; - enable-gpios = <&gpio 27 0>; - }; - BUCKB { - regulator-name = "VBUCKB"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <2000000>; - regulator-max-microamp = <5000000>; - enable-gpios = <&gpio 17 0>; - }; - }; - }; - -Example 3) DA9213 - pmic: da9213@68 { - compatible = "dlg,da9213"; - reg = <0x68>; - interrupts = <3 27>; - - regulators { - BUCKA { - regulator-name = "VBUCKA"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <3000000>; - regulator-max-microamp = <6000000>; - enable-gpios = <&gpio 27 0>; - }; - }; - }; - -Example 4) DA9223 - pmic: da9223@68 { - compatible = "dlg,da9223"; - reg = <0x68>; - interrupts = <3 27>; - - regulators { - BUCKA { - regulator-name = "VBUCKA"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <3000000>; - regulator-max-microamp = <6000000>; - enable-gpios = <&gpio 27 0>; - }; - }; - }; - -Example 5) DA9214 - pmic: da9214@68 { - compatible = "dlg,da9214"; - reg = <0x68>; - interrupts = <3 27>; - - regulators { - BUCKA { - regulator-name = "VBUCKA"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <3000000>; - regulator-max-microamp = <6000000>; - enable-gpios = <&gpio 27 0>; - }; - BUCKB { - regulator-name = "VBUCKB"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <3000000>; - regulator-max-microamp = <6000000>; - enable-gpios = <&gpio 17 0>; - }; - }; - }; - -Example 6) DA9224 - pmic: da9224@68 { - compatible = "dlg,da9224"; - reg = <0x68>; - interrupts = <3 27>; - - regulators { - BUCKA { - regulator-name = "VBUCKA"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <3000000>; - regulator-max-microamp = <6000000>; - enable-gpios = <&gpio 27 0>; - }; - BUCKB { - regulator-name = "VBUCKB"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <3000000>; - regulator-max-microamp = <6000000>; - enable-gpios = <&gpio 17 0>; - }; - }; - }; - -Example 7) DA9215 - pmic: da9215@68 { - compatible = "dlg,da9215"; - reg = <0x68>; - interrupts = <3 27>; - - regulators { - BUCKA { - regulator-name = "VBUCKA"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <4000000>; - regulator-max-microamp = <7000000>; - enable-gpios = <&gpio 27 0>; - }; - BUCKB { - regulator-name = "VBUCKB"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <4000000>; - regulator-max-microamp = <7000000>; - enable-gpios = <&gpio 17 0>; - }; - }; - }; - -Example 8) DA9225 - pmic: da9225@68 { - compatible = "dlg,da9225"; - reg = <0x68>; - interrupts = <3 27>; - - regulators { - BUCKA { - regulator-name = "VBUCKA"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <4000000>; - regulator-max-microamp = <7000000>; - enable-gpios = <&gpio 27 0>; - }; - BUCKB { - regulator-name = "VBUCKB"; - regulator-min-microvolt = < 300000>; - regulator-max-microvolt = <1570000>; - regulator-min-microamp = <4000000>; - regulator-max-microamp = <7000000>; - enable-gpios = <&gpio 17 0>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/regulator/dlg,da9211.yaml b/Documentation/devicetree/bindings/regulator/dlg,da9211.yaml new file mode 100644 index 000000000000..4d7e495a6f59 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/dlg,da9211.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/dlg,da9211.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Dialog Semiconductor DA9211-9215, DA9223-9225 Voltage Regulators + +maintainers: + - Ariel D'Alessandro <ariel.dalessandro@collabora.com> + +properties: + compatible: + enum: + - dlg,da9211 + - dlg,da9212 + - dlg,da9213 + - dlg,da9214 + - dlg,da9215 + - dlg,da9223 + - dlg,da9224 + - dlg,da9225 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + regulators: + type: object + additionalProperties: false + description: + List of regulators provided by the device + + patternProperties: + "^BUCK([AB])$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + description: + Properties for a single BUCK regulator + + properties: + regulator-initial-mode: + items: + enum: [ 1, 2, 3 ] + description: + Defined in include/dt-bindings/regulator/dlg,da9211-regulator.h + + regulator-allowed-modes: + items: + enum: [ 1, 2, 3 ] + description: + Defined in include/dt-bindings/regulator/dlg,da9211-regulator.h + + enable-gpios: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - regulators + +additionalProperties: false + +examples: + - | + #include <dt-bindings/regulator/dlg,da9211-regulator.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + regulator@68 { + compatible = "dlg,da9212"; + reg = <0x68>; + interrupts = <3 27>; + + regulators { + BUCKA { + regulator-name = "VBUCKA"; + regulator-min-microvolt = < 300000>; + regulator-max-microvolt = <1570000>; + regulator-min-microamp = <2000000>; + regulator-max-microamp = <5000000>; + enable-gpios = <&gpio 27 0>; + }; + BUCKB { + regulator-name = "VBUCKB"; + regulator-min-microvolt = < 300000>; + regulator-max-microvolt = <1570000>; + regulator-min-microamp = <2000000>; + regulator-max-microamp = <5000000>; + enable-gpios = <&gpio 17 0>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/regulator/fitipower,fp9931.yaml b/Documentation/devicetree/bindings/regulator/fitipower,fp9931.yaml new file mode 100644 index 000000000000..c6585e3bacbe --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/fitipower,fp9931.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/fitipower,fp9931.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FitiPower FP9931/JD9930 Power Management Integrated Circuit + +maintainers: + - Andreas Kemnade <andreas@kemnade.info> + +description: + FP9931 is a Power Management IC to provide Power for EPDs with one 3.3V + switch, 2 symmetric LDOs behind 2 DC/DC converters, and one unsymmetric + regulator for a compensation voltage. + JD9930 has in addition some kind of night mode. + +properties: + compatible: + oneOf: + - const: fitipower,fp9931 + + - items: + - const: fitipower,jd9930 + - const: fitipower,fp9931 + + reg: + maxItems: 1 + + enable-gpios: + maxItems: 1 + + pg-gpios: + maxItems: 1 + + en-ts-gpios: + maxItems: 1 + + xon-gpios: + maxItems: 1 + + vin-supply: + description: + Supply for the whole chip. Some vendor kernels and devicetrees + declare this as a non-existing GPIO named "pwrall". + + fitipower,tdly-ms: + description: + Power up soft start delay settings tDLY1-4 bitfields in the + POWERON_DELAY register + items: + - enum: [0, 1, 2, 4] + - enum: [0, 1, 2, 4] + - enum: [0, 1, 2, 4] + - enum: [0, 1, 2, 4] + + regulators: + type: object + additionalProperties: false + patternProperties: + "^(vcom|vposneg|v3p3)$": + unevaluatedProperties: false + type: object + $ref: /schemas/regulator/regulator.yaml + +required: + - compatible + - reg + - pg-gpios + - enable-gpios + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@18 { + compatible = "fitipower,fp9931"; + reg = <0x18>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fp9931_gpio>; + vin-supply = <&epd_pmic_supply>; + pg-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; + en-ts-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; + fitipower,tdly-ms = <2 2 4 4>; + + regulators { + vcom { + regulator-name = "vcom"; + regulator-min-microvolt = <2352840>; + regulator-max-microvolt = <2352840>; + }; + + vposneg { + regulator-name = "vposneg"; + regulator-min-microvolt = <15060000>; + regulator-max-microvolt = <15060000>; + }; + + v3p3 { + regulator-name = "v3p3"; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6316b-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6316b-regulator.yaml new file mode 100644 index 000000000000..ea595935f4c4 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6316b-regulator.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6316b-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6316 BP/VP SPMI PMIC Regulators + +maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + +description: + The MediaTek MT6316BP/VP PMICs are fully controlled by SPMI interface, both + feature four step-down DC/DC (buck) converters, and provides 2+2 Phases, + joining Buck 1+2 for the first phase, and Buck 3+4 for the second phase. + +properties: + compatible: + const: mediatek,mt6316b-regulator + + reg: + maxItems: 1 + +patternProperties: + "^vbuck(12|34)$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + properties: + regulator-allowed-modes: + description: | + Allowed Buck regulator operating modes allowed. Valid values below. + 0 - Normal mode with automatic power saving, reducing the switching + frequency when light load conditions are detected + 1 - Forced Continuous Conduction mode (FCCM) for improved voltage + regulation accuracy with constant switching frequency but lower + regulator efficiency + 2 - Forced Low Power mode for improved regulator efficiency, used + when no heavy load is expected, will shut down unnecessary IP + blocks and secondary phases to reduce quiescent current. + This mode does not limit the maximum output current but unless + only a light load is applied, there will be regulation accuracy + and efficiency losses. + minItems: 1 + maxItems: 3 + items: + enum: [ 0, 1, 2 ] + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/spmi/spmi.h> + + spmi { + #address-cells = <2>; + #size-cells = <0>; + + pmic@8 { + compatible = "mediatek,mt6316b-regulator"; + reg = <0x8 SPMI_USID>; + + vbuck12 { + regulator-name = "dvdd_core"; + regulator-min-microvolt = <450000>; + regulator-max-microvolt = <965000>; + regulator-allowed-modes = <0 1 2>; + regulator-enable-ramp-delay = <256>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6316c-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6316c-regulator.yaml new file mode 100644 index 000000000000..186dcd3f11ed --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6316c-regulator.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6316c-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6316 CP/HP/KP SPMI PMIC Regulators + +maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + +description: + The MediaTek MT6316CP/HP/KP PMICs are fully controlled by SPMI interface, + features four step-down DC/DC (buck) converters, and provides 3+1 Phases, + joining Buck 1+2+4 for the first phase, and uses Buck 3 for the second. + +properties: + compatible: + const: mediatek,mt6316c-regulator + + reg: + maxItems: 1 + +patternProperties: + "^vbuck(124|3)$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + properties: + regulator-allowed-modes: + description: | + Allowed Buck regulator operating modes allowed. Valid values below. + 0 - Normal mode with automatic power saving, reducing the switching + frequency when light load conditions are detected + 1 - Forced Continuous Conduction mode (FCCM) for improved voltage + regulation accuracy with constant switching frequency but lower + regulator efficiency + 2 - Forced Low Power mode for improved regulator efficiency, used + when no heavy load is expected, will shut down unnecessary IP + blocks and secondary phases to reduce quiescent current. + This mode does not limit the maximum output current but unless + only a light load is applied, there will be regulation accuracy + and efficiency losses. + minItems: 1 + maxItems: 3 + items: + enum: [ 0, 1, 2 ] + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/spmi/spmi.h> + + spmi { + #address-cells = <2>; + #size-cells = <0>; + + pmic@6 { + compatible = "mediatek,mt6316c-regulator"; + reg = <0x6 SPMI_USID>; + + vbuck124 { + regulator-name = "dvdd_proc_m"; + regulator-min-microvolt = <450000>; + regulator-max-microvolt = <1277500>; + regulator-allowed-modes = <0 1 2>; + regulator-enable-ramp-delay = <256>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6316d-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6316d-regulator.yaml new file mode 100644 index 000000000000..aa9e9ef3b52d --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6316d-regulator.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6316d-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6316 DP/TP SPMI PMIC Regulators + +maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + +description: + The MediaTek MT6316DP/TP PMICs are fully controlled by SPMI interface, both + feature four step-down DC/DC (buck) converters, and provides a single Phase, + joining Buck 1+2+3+4. + +properties: + compatible: + const: mediatek,mt6316d-regulator + + reg: + maxItems: 1 + + vbuck1234: + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + properties: + regulator-allowed-modes: + description: | + Allowed Buck regulator operating modes allowed. Valid values below. + 0 - Normal mode with automatic power saving, reducing the switching + frequency when light load conditions are detected + 1 - Forced Continuous Conduction mode (FCCM) for improved voltage + regulation accuracy with constant switching frequency but lower + regulator efficiency + 2 - Forced Low Power mode for improved regulator efficiency, used + when no heavy load is expected, will shut down unnecessary IP + blocks and secondary phases to reduce quiescent current. + This mode does not limit the maximum output current but unless + only a light load is applied, there will be regulation accuracy + and efficiency losses. + minItems: 1 + maxItems: 3 + items: + enum: [ 0, 1, 2 ] + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/spmi/spmi.h> + + spmi { + #address-cells = <2>; + #size-cells = <0>; + + pmic@7 { + compatible = "mediatek,mt6316d-regulator"; + reg = <0x7 SPMI_USID>; + + vbuck1234 { + regulator-name = "dvdd_gpustack"; + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1277500>; + regulator-allowed-modes = <0 1 2>; + regulator-enable-ramp-delay = <256>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6363-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6363-regulator.yaml new file mode 100644 index 000000000000..4f79d4f81d49 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6363-regulator.yaml @@ -0,0 +1,146 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6363-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6363 PMIC Regulators + +maintainers: + - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + +description: + The MT6363 SPMI PMIC provides 10 BUCK and 25 LDO (Low DropOut) regulators + and can optionally provide overcurrent warnings with one ocp interrupt + for each voltage regulator. + +properties: + compatible: + const: mediatek,mt6363-regulator + + reg: + maxItems: 1 + + vsys-vbuck1-supply: + description: Input supply for vbuck1 + + vsys-vbuck2-supply: + description: Input supply for vbuck2 + + vsys-vbuck3-supply: + description: Input supply for vbuck3 + + vsys-vbuck4-supply: + description: Input supply for vbuck4 + + vsys-vbuck5-supply: + description: Input supply for vbuck5 + + vsys-vbuck6-supply: + description: Input supply for vbuck6 + + vsys-vbuck7-supply: + description: Input supply for vbuck7 + + vsys-vs1-supply: + description: Input supply for vs1 + + vsys-vs2-supply: + description: Input supply for vs2 + + vsys-vs3-supply: + description: Input supply for vs3 + + vs1-ldo1-supply: + description: Input supply for va15, vio0p75, vm18, vrf18, vrf-io18 + + vs1-ldo2-supply: + description: Input supply for vcn15, vio18, vufs18 + + vs2-ldo1-supply: + description: Input supply for vsram-cpub, vsram-cpum, vrf12, vrf13, vufs12 + + vs2-ldo2-supply: + description: Input supply for va12-1, va12-2, vcn13, vsram-cpul + + vs3-ldo1-supply: + description: Input supply for vsram-apu, vsram-digrf, vsram-mdfe + + vs3-ldo2-supply: + description: Input supply for vsram-modem, vrf0p9 + + vsys-ldo1-supply: + description: Input supply for vaux18, vemc, vtref18 + +patternProperties: + "^v(buck[1-7]|s[1-3])$": + description: Buck regulators + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + properties: + regulator-allowed-modes: + description: | + Allowed Buck regulator operating modes allowed. Valid values below. + 0 - Normal mode with automatic power saving, reducing the switching + frequency when light load conditions are detected + 1 - Forced Continuous Conduction mode (FCCM) for improved voltage + regulation accuracy with constant switching frequency but lower + regulator efficiency + 2 - Forced Low Power mode for improved regulator efficiency, used + when no heavy load is expected, does not limit the maximum out + current but unless only a light load is applied, there will be + regulation accuracy and efficiency losses. + 3 - Forced Ultra Low Power mode for ultra low load, this greatly + reduces the maximum output power, makes the regulator to be + efficient only for ultra light load, and greatly reduces the + quiescent current (Iq) of the buck. + maxItems: 3 + items: + enum: [ 0, 1, 2, 3 ] + + "^va(12-1|12-2|15)$": + $ref: "#/$defs/ldo-common" + + "^v(aux|m|rf-io|tref)18$": + $ref: "#/$defs/ldo-common" + + "^v(cn13|cn15|emc)$": + $ref: "#/$defs/ldo-common" + + "^vio(0p75|18)$": + $ref: "#/$defs/ldo-common" + + "^vrf(0p9|12|13|18)$": + $ref: "#/$defs/ldo-common" + + "^vsram-(apu|cpub|cpum|cpul|digrf|mdfe|modem)$": + $ref: "#/$defs/ldo-common" + + "^vufs(12|18)$": + $ref: "#/$defs/ldo-common" + +$defs: + ldo-common: + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + properties: + regulator-allowed-modes: + description: | + Allowed LDO regulator operating modes allowed. Valid values below. + 0 - Normal mode with automatic power saving, reducing the switching + frequency when light load conditions are detected + 2 - Forced Low Power mode for improved regulator efficiency, used + when no heavy load is expected, does not limit the maximum out + current but unless only a light load is applied, there will be + regulation accuracy and efficiency losses. + maxItems: 2 + items: + enum: [ 0, 2 ] + +required: + - compatible + - reg + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml b/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml index a5486c36830f..ec04adfb9d1c 100644 --- a/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml @@ -41,6 +41,21 @@ properties: interrupts: maxItems: 1 + inl1-supply: + description: Regulator supply for the INL1 pin group, powering LDOx + + inb13-supply: + description: + Regulator supply for the INB13 pin group, powering BUCK1 and BUCK3. + + inb26-supply: + description: + Regulator supply for the INB26 pin group, powering BUCK2 and BUCK6. + + inb45-supply: + description: + Regulator supply for the INB45 pin group, powering BUCK4 and BUCK5. + regulators: type: object description: | @@ -124,6 +139,30 @@ properties: When WDOG_B signal is asserted a warm reset will be done instead of cold reset. + nxp,pmic-on-req-on-debounce-us: + enum: [ 120, 20000, 100000, 750000 ] + description: Debounce time for PMIC_ON_REQ high. + + nxp,pmic-on-req-off-debounce-us: + enum: [ 120, 2000 ] + description: Debounce time for PMIC_ON_REQ is asserted low + + nxp,power-on-step-ms: + enum: [ 1, 2, 4, 8] + description: Time step configuration during power on sequence + + nxp,power-down-step-ms: + enum: [ 2, 4, 8, 16 ] + description: Time step configuration during power down sequence + + nxp,restart-ms: + enum: [ 250, 500 ] + description: Time to stay off regulators during Cold reset + + npx,pmic-rst-b-debounce-ms: + enum: [ 10, 50, 100, 500, 1000, 2000, 4000, 8000 ] + description: PMIC_RST_B debounce time + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index 4c5b0629aa3e..58bb0ad5dda4 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -8,7 +8,7 @@ title: Qualcomm Technologies, Inc. RPMh Regulators maintainers: - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: | rpmh-regulator devices support PMIC regulator management via the Voltage @@ -51,10 +51,15 @@ description: | For PM8450, smps1 - smps6, ldo1 - ldo4 For PM8550, smps1 - smps6, ldo1 - ldo17, bob1 - bob2 For PM8998, smps1 - smps13, ldo1 - ldo28, lvs1 - lvs2 + For PMH0101, ldo1 - ldo18, bob1 - bob2 + For PMH0104, smps1 - smps4 + For PMH0110, smps1 - smps10, ldo1 - ldo4 For PMI8998, bob For PMC8380, smps1 - smps8, ldo1 - lodo3 + For PMCX0102, smps1 - smps10, ldo1 - ldo4 For PMR735A, smps1 - smps3, ldo1 - ldo7 For PMR735B, ldo1 - ldo12 + For PMR735D, ldo1 - ldo7 For PMX55, smps1 - smps7, ldo1 - ldo16 For PMX65, smps1 - smps8, ldo1 - ldo21 For PMX75, smps1 - smps10, ldo1 - ldo21 @@ -85,12 +90,17 @@ properties: - qcom,pmc8180-rpmh-regulators - qcom,pmc8180c-rpmh-regulators - qcom,pmc8380-rpmh-regulators + - qcom,pmcx0102-rpmh-regulators - qcom,pmg1110-rpmh-regulators + - qcom,pmh0101-rpmh-regulators + - qcom,pmh0104-rpmh-regulators + - qcom,pmh0110-rpmh-regulators - qcom,pmi8998-rpmh-regulators - qcom,pmm8155au-rpmh-regulators - qcom,pmm8654au-rpmh-regulators - qcom,pmr735a-rpmh-regulators - qcom,pmr735b-rpmh-regulators + - qcom,pmr735d-rpmh-regulators - qcom,pmx55-rpmh-regulators - qcom,pmx65-rpmh-regulators - qcom,pmx75-rpmh-regulators @@ -100,7 +110,7 @@ properties: RPMh resource name suffix used for the regulators found on this PMIC. $ref: /schemas/types.yaml#/definitions/string - enum: [a, b, c, d, e, f, g, h, i, j, k, l, m, n] + pattern: "^[a-n]|[A-N]_E[0-3]+$" qcom,always-wait-for-ack: description: | @@ -246,6 +256,7 @@ allOf: compatible: enum: - qcom,pm8005-rpmh-regulators + - qcom,pmh0104-rpmh-regulators then: patternProperties: "^vdd-s[1-4]-supply$": true @@ -426,6 +437,34 @@ allOf: properties: compatible: enum: + - qcom,pmh0101-rpmh-regulators + then: + properties: + vdd-l1-l4-l10-supply: true + vdd-l2-l13-l14-supply: true + vdd-l3-l11-supply: true + vdd-l5-l16-supply: true + vdd-l6-l7-supply: true + vdd-l8-l9-supply: true + patternProperties: + "^vdd-l(1[2578])-supply$": true + "^vdd-bob[1-2]-supply$": true + + - if: + properties: + compatible: + enum: + - qcom,pmcx0102-rpmh-regulators + - qcom,pmh0110-rpmh-regulators + then: + patternProperties: + "^vdd-l[1-4]-supply$": true + "^vdd-s([1-9]|10)-supply$": true + + - if: + properties: + compatible: + enum: - qcom,pmi8998-rpmh-regulators then: properties: @@ -463,6 +502,18 @@ allOf: properties: compatible: enum: + - qcom,pmr735d-rpmh-regulators + then: + properties: + vdd-l1-l2-l5-supply: true + vdd-l3-l4-supply: true + patternProperties: + "^vdd-l[6-7]-supply$": true + + - if: + properties: + compatible: + enum: - qcom,pmx55-rpmh-regulators then: properties: diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml index b73762e151bb..84546fec3b18 100644 --- a/Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml @@ -55,7 +55,6 @@ properties: delay time 0us, 10us, 20us, 40us. If this property is missing then keep in chip default. - richtek,switch-freq-select: $ref: /schemas/types.yaml#/definitions/uint8 enum: [0, 1, 2] diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml index a492f74a8608..a927551356e6 100644 --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml @@ -79,7 +79,6 @@ properties: It should be set as 3 (Single-Core mode) which is also the default if omitted. - # R5F Processor Child Nodes: # ========================== @@ -167,7 +166,6 @@ patternProperties: - description: region reserved for firmware image sections additionalItems: true - # Optional properties: # -------------------- # The following properties are optional properties for each of the R5F cores: diff --git a/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml b/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml index 1db08ce9ae27..68640abacd95 100644 --- a/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml +++ b/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml @@ -40,7 +40,6 @@ properties: Please see https://software-dl.ti.com/tisci/esd/latest/index.html for protocol documentation for the values to be used for different devices. - additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/rng/inside-secure,safexcel-eip76.yaml b/Documentation/devicetree/bindings/rng/inside-secure,safexcel-eip76.yaml index 0877eb44f9ed..f501fc7691c6 100644 --- a/Documentation/devicetree/bindings/rng/inside-secure,safexcel-eip76.yaml +++ b/Documentation/devicetree/bindings/rng/inside-secure,safexcel-eip76.yaml @@ -44,7 +44,6 @@ properties: - const: core - const: reg - allOf: - if: properties: @@ -58,7 +57,6 @@ allOf: required: - interrupts - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml index ea6abfe2d95e..bc2e48754805 100644 --- a/Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml +++ b/Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml @@ -8,7 +8,7 @@ title: Qualcomm MSM SoC Serial UART maintainers: - Bjorn Andersson <andersson@kernel.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: The MSM serial UART hardware is designed for low-speed use cases where a diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml index e0fa363ad7e2..788ef5c1c446 100644 --- a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml +++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml @@ -9,7 +9,7 @@ title: Qualcomm MSM Serial UARTDM maintainers: - Andy Gross <agross@kernel.org> - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: | The MSM serial UARTDM hardware is designed for high-speed use cases where the diff --git a/Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml b/Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml index abf61c15246e..27a92b79c724 100644 --- a/Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml +++ b/Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SoC SLIMBus Non Generic Device (NGD) Controller maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: diff --git a/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml index e28ef198a801..039c8e4a4c51 100644 --- a/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml +++ b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml @@ -13,23 +13,21 @@ description: | maintainers: - Nicolas Saenz Julienne <nsaenz@kernel.org> -allOf: - - $ref: /schemas/watchdog/watchdog.yaml# - properties: compatible: items: - enum: - brcm,bcm2835-pm - brcm,bcm2711-pm + - brcm,bcm2712-pm - const: brcm,bcm2835-pm-wdt reg: - minItems: 2 + minItems: 1 maxItems: 3 reg-names: - minItems: 2 + minItems: 1 items: - const: pm - const: asb @@ -62,7 +60,35 @@ required: - reg - "#power-domain-cells" - "#reset-cells" - - clocks + +allOf: + - $ref: /schemas/watchdog/watchdog.yaml# + + - if: + properties: + compatible: + contains: + enum: + - brcm,bcm2835-pm + - brcm,bcm2711-pm + then: + required: + - clocks + + properties: + reg: + minItems: 2 + + reg-names: + minItems: 2 + + else: + properties: + reg: + maxItems: 1 + + reg-names: + maxItems: 1 additionalProperties: false diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-muram.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-muram.yaml index cf0f38dbbe0d..2c06d869fdb5 100644 --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-muram.yaml +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-muram.yaml @@ -30,7 +30,6 @@ properties: $ref: /schemas/types.yaml#/definitions/string enum: [host, slave] - patternProperties: '^data\-only@[a-f0-9]+$': type: object diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml index a10326a9683d..5267cfe92572 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml @@ -91,7 +91,6 @@ allOf: required: - clocks - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml index 2c7275c4503b..668b943db173 100644 --- a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml @@ -57,7 +57,7 @@ properties: const: 0 patternProperties: - "^timer@[0-2]$": + '^timer@[0-2]$': description: The timer block channels that are used as timers or counters. type: object additionalProperties: false @@ -80,7 +80,7 @@ patternProperties: - compatible - reg - "^pwm@[0-2]$": + '^pwm@[0-2]$': description: The timer block channels that are used as PWMs. $ref: /schemas/pwm/pwm.yaml# type: object @@ -92,7 +92,7 @@ patternProperties: TCB channel to use for this PWM. enum: [ 0, 1, 2 ] - "#pwm-cells": + '#pwm-cells': description: The only third cell flag supported by this binding is PWM_POLARITY_INVERTED. @@ -101,11 +101,10 @@ patternProperties: required: - compatible - reg - - "#pwm-cells" + - '#pwm-cells' additionalProperties: false - allOf: - if: properties: diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml index c33704333e49..d9f6d34a61c6 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml @@ -9,7 +9,7 @@ title: Qualcomm General Serial Bus Interface (GSBI) maintainers: - Andy Gross <agross@kernel.org> - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: The GSBI controller is modeled as a node with zero or more child nodes, each diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml index d9fabefc8147..b667f4afdb55 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml @@ -9,7 +9,7 @@ title: Qualcomm Shared Memory Driver maintainers: - Andy Gross <agross@kernel.org> - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: The Qualcomm Shared Memory Driver is a FIFO based communication channel for diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml index 1ba1d419e83b..f91276822858 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml @@ -9,7 +9,7 @@ title: Qualcomm Shared Memory Point 2 Point maintainers: - Andy Gross <agross@kernel.org> - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: The Shared Memory Point to Point (SMP2P) protocol facilitates communication diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml index 4900215f26af..67d4a7cb9eeb 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml @@ -9,7 +9,7 @@ title: Qualcomm Shared Memory State Machine maintainers: - Andy Gross <agross@kernel.org> - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: The Shared Memory State Machine facilitates broadcasting of single bit state diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml index dca5e27b8233..0b8e3294c83e 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -317,7 +317,6 @@ allOf: properties: clocks: false - examples: - | #include <dt-bindings/clock/rk3399-cru.h> diff --git a/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml index 7140c312d898..f516960dbbef 100644 --- a/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml +++ b/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml @@ -133,12 +133,12 @@ properties: property. The supported-hw is a bitfield indicating SoC speedo or process ID mask. - "#power-domain-cells": + '#power-domain-cells': const: 0 required: - operating-points-v2 - - "#power-domain-cells" + - '#power-domain-cells' i2c-thermtrip: type: object @@ -220,7 +220,7 @@ properties: xusbc USB Partition C Tegra114/124/210 patternProperties: - "^[a-z0-9]+$": + '^[a-z0-9]+$': type: object additionalProperties: false properties: @@ -365,9 +365,9 @@ allOf: additionalProperties: false dependencies: - nvidia,suspend-mode: ["nvidia,core-pwr-off-time", "nvidia,cpu-pwr-off-time"] - nvidia,core-pwr-off-time: ["nvidia,core-pwr-good-time"] - nvidia,cpu-pwr-off-time: ["nvidia,cpu-pwr-good-time"] + nvidia,suspend-mode: ['nvidia,core-pwr-off-time', 'nvidia,cpu-pwr-off-time'] + nvidia,core-pwr-off-time: ['nvidia,core-pwr-good-time'] + nvidia,cpu-pwr-off-time: ['nvidia,cpu-pwr-good-time'] examples: - | diff --git a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml index b5336bcbfb01..d97e88433d2f 100644 --- a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml +++ b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml @@ -11,7 +11,6 @@ maintainers: - Suman Anna <s-anna@ti.com> description: |+ - The Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x, Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC @@ -44,7 +43,6 @@ description: |+ integration within the IP and the SoC. These nodes are described in the following sections. - PRU-ICSS Node ============== Each PRU-ICSS instance is represented as its own node with the individual PRU @@ -54,7 +52,6 @@ description: |+ See ../../mfd/syscon.yaml for generic SysCon binding details. - properties: $nodename: pattern: "^(pruss|icssg)@[0-9a-f]+$" diff --git a/Documentation/devicetree/bindings/sound/adi,adau1372.yaml b/Documentation/devicetree/bindings/sound/adi,adau1372.yaml index ea62e51aba90..9a7ff50a0a22 100644 --- a/Documentation/devicetree/bindings/sound/adi,adau1372.yaml +++ b/Documentation/devicetree/bindings/sound/adi,adau1372.yaml @@ -4,7 +4,6 @@ $id: http://devicetree.org/schemas/sound/adi,adau1372.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# - title: Analog Devices ADAU1372 CODEC maintainers: diff --git a/Documentation/devicetree/bindings/sound/adi,adau7002.yaml b/Documentation/devicetree/bindings/sound/adi,adau7002.yaml index fcca0fde7d86..7858f3f8ec2f 100644 --- a/Documentation/devicetree/bindings/sound/adi,adau7002.yaml +++ b/Documentation/devicetree/bindings/sound/adi,adau7002.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Analog Devices ADAU7002 Stereo PDM-to-I2S/TDM Converter maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> allOf: - $ref: dai-common.yaml# diff --git a/Documentation/devicetree/bindings/sound/adi,adau7118.yaml b/Documentation/devicetree/bindings/sound/adi,adau7118.yaml index 12f60507aed7..11f59c29b575 100644 --- a/Documentation/devicetree/bindings/sound/adi,adau7118.yaml +++ b/Documentation/devicetree/bindings/sound/adi,adau7118.yaml @@ -4,7 +4,6 @@ $id: http://devicetree.org/schemas/sound/adi,adau7118.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# - title: Analog Devices ADAU7118 8 Channel PDM to I2S/TDM Converter maintainers: diff --git a/Documentation/devicetree/bindings/sound/adi,max98363.yaml b/Documentation/devicetree/bindings/sound/adi,max98363.yaml deleted file mode 100644 index c388cda56011..000000000000 --- a/Documentation/devicetree/bindings/sound/adi,max98363.yaml +++ /dev/null @@ -1,60 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/adi,max98363.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Analog Devices MAX98363 SoundWire Amplifier - -maintainers: - - Ryan Lee <ryans.lee@analog.com> - -description: - The MAX98363 is a SoundWire input Class D mono amplifier that - supports MIPI SoundWire v1.2-compatible digital interface for - audio and control data. - SoundWire peripheral device ID of MAX98363 is 0x3*019f836300 - where * is the peripheral device unique ID decoded from pin. - It supports up to 10 peripheral devices(0x0 to 0x9). - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: sdw3019f836300 - - reg: - maxItems: 1 - - '#sound-dai-cells': - const: 0 - -required: - - compatible - - reg - - "#sound-dai-cells" - -unevaluatedProperties: false - -examples: - - | - soundwire@3250000 { - #address-cells = <2>; - #size-cells = <0>; - reg = <0x3250000 0x2000>; - - speaker@0,0 { - compatible = "sdw3019f836300"; - reg = <0 0>; - #sound-dai-cells = <0>; - sound-name-prefix = "Speaker Left"; - }; - - speaker@0,1 { - compatible = "sdw3019f836300"; - reg = <0 1>; - #sound-dai-cells = <0>; - sound-name-prefix = "Speaker Right"; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/adi,ssm2602.txt b/Documentation/devicetree/bindings/sound/adi,ssm2602.txt deleted file mode 100644 index 3b3302fe399b..000000000000 --- a/Documentation/devicetree/bindings/sound/adi,ssm2602.txt +++ /dev/null @@ -1,19 +0,0 @@ -Analog Devices SSM2602, SSM2603 and SSM2604 I2S audio CODEC devices - -SSM2602 support both I2C and SPI as the configuration interface, -the selection is made by the MODE strap-in pin. -SSM2603 and SSM2604 only support I2C as the configuration interface. - -Required properties: - - - compatible : One of "adi,ssm2602", "adi,ssm2603" or "adi,ssm2604" - - - reg : the I2C address of the device for I2C, the chip select - number for SPI. - - Example: - - ssm2602: ssm2602@1a { - compatible = "adi,ssm2602"; - reg = <0x1a>; - }; diff --git a/Documentation/devicetree/bindings/sound/adi,ssm3515.yaml b/Documentation/devicetree/bindings/sound/adi,ssm3515.yaml deleted file mode 100644 index 144450df5869..000000000000 --- a/Documentation/devicetree/bindings/sound/adi,ssm3515.yaml +++ /dev/null @@ -1,49 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/adi,ssm3515.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Analog Devices SSM3515 Audio Amplifier - -maintainers: - - Martin PoviÅ¡er <povik+lin@cutebit.org> - -description: | - SSM3515 is a mono Class-D audio amplifier with digital input. - - https://www.analog.com/media/en/technical-documentation/data-sheets/SSM3515.pdf - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - enum: - - adi,ssm3515 - - reg: - maxItems: 1 - - '#sound-dai-cells': - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - codec@14 { - compatible = "adi,ssm3515"; - reg = <0x14>; - #sound-dai-cells = <0>; - sound-name-prefix = "Left Tweeter"; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml index 739114fb6549..ae86cb5f0a74 100644 --- a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml +++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml @@ -33,7 +33,9 @@ properties: - const: allwinner,sun50i-h6-i2s - const: allwinner,sun50i-r329-i2s - items: - - const: allwinner,sun20i-d1-i2s + - enum: + - allwinner,sun20i-d1-i2s + - allwinner,sun55i-a523-i2s - const: allwinner,sun50i-r329-i2s reg: diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml index aa32dc950e72..1d089ba70f45 100644 --- a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml +++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml @@ -23,6 +23,7 @@ properties: - const: allwinner,sun8i-h3-spdif - const: allwinner,sun50i-h6-spdif - const: allwinner,sun50i-h616-spdif + - const: allwinner,sun55i-a523-spdif - items: - const: allwinner,sun8i-a83t-spdif - const: allwinner,sun8i-h3-spdif @@ -37,14 +38,12 @@ properties: maxItems: 1 clocks: - items: - - description: Bus Clock - - description: Module Clock + minItems: 2 + maxItems: 3 clock-names: - items: - - const: apb - - const: spdif + minItems: 2 + maxItems: 3 # Even though it only applies to subschemas under the conditionals, # not listing them here will trigger a warning because of the @@ -65,6 +64,7 @@ allOf: - allwinner,sun8i-h3-spdif - allwinner,sun50i-h6-spdif - allwinner,sun50i-h616-spdif + - allwinner,sun55i-a523-spdif then: required: @@ -98,6 +98,38 @@ allOf: - const: rx - const: tx + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun55i-a523-spdif + + then: + properties: + clocks: + items: + - description: Bus Clock + - description: TX Clock + - description: RX Clock + + clock-names: + items: + - const: apb + - const: tx + - const: rx + else: + properties: + clocks: + items: + - description: Bus Clock + - description: Module Clock + + clock-names: + items: + - const: apb + - const: spdif + required: - "#sound-dai-cells" - compatible diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs4271.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs4271.yaml index 68fbf5cc208f..d286eb169915 100644 --- a/Documentation/devicetree/bindings/sound/cirrus,cs4271.yaml +++ b/Documentation/devicetree/bindings/sound/cirrus,cs4271.yaml @@ -25,6 +25,16 @@ properties: reg: maxItems: 1 + clocks: + items: + - description: + Master clock connected to the MCLK pin if MCLK is an input (i.e. no + crystal used). + + clock-names: + items: + - const: mclk + spi-cpha: true spi-cpol: true diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs530x.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs530x.yaml index 9582eb8eb418..7600fff0e3b7 100644 --- a/Documentation/devicetree/bindings/sound/cirrus,cs530x.yaml +++ b/Documentation/devicetree/bindings/sound/cirrus,cs530x.yaml @@ -15,10 +15,15 @@ description: allOf: - $ref: dai-common.yaml# + - $ref: /schemas/spi/spi-peripheral-props.yaml# properties: compatible: enum: + - cirrus,cs4282 + - cirrus,cs4302 + - cirrus,cs4304 + - cirrus,cs4308 - cirrus,cs5302 - cirrus,cs5304 - cirrus,cs5308 @@ -26,6 +31,9 @@ properties: reg: maxItems: 1 + spi-max-frequency: + maximum: 24000000 + '#sound-dai-cells': const: 1 diff --git a/Documentation/devicetree/bindings/sound/cs4265.txt b/Documentation/devicetree/bindings/sound/cs4265.txt deleted file mode 100644 index 380fff8e4e83..000000000000 --- a/Documentation/devicetree/bindings/sound/cs4265.txt +++ /dev/null @@ -1,29 +0,0 @@ -CS4265 audio CODEC - -This device supports I2C only. - -Required properties: - - - compatible : "cirrus,cs4265" - - - reg : the I2C address of the device for I2C. The I2C address depends on - the state of the AD0 pin. If AD0 is high, the i2c address is 0x4f. - If it is low, the i2c address is 0x4e. - -Optional properties: - - - reset-gpios : a GPIO spec for the reset pin. If specified, it will be - deasserted before communication to the codec starts. - -Examples: - -codec_ad0_high: cs4265@4f { /* AD0 Pin is high */ - compatible = "cirrus,cs4265"; - reg = <0x4f>; -}; - - -codec_ad0_low: cs4265@4e { /* AD0 Pin is low */ - compatible = "cirrus,cs4265"; - reg = <0x4e>; -}; diff --git a/Documentation/devicetree/bindings/sound/cs4341.txt b/Documentation/devicetree/bindings/sound/cs4341.txt deleted file mode 100644 index c1d5c8ad1a36..000000000000 --- a/Documentation/devicetree/bindings/sound/cs4341.txt +++ /dev/null @@ -1,22 +0,0 @@ -Cirrus Logic CS4341 audio DAC - -This device supports both I2C and SPI (configured with pin strapping -on the board). - -Required properties: - - compatible: "cirrus,cs4341a" - - reg : the I2C address of the device for I2C, the chip select - number for SPI. - -For required properties on I2C-bus, please consult -dtschema schemas/i2c/i2c-controller.yaml -For required properties on SPI-bus, please consult -Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: - codec: cs4341@0 { - #sound-dai-cells = <0>; - compatible = "cirrus,cs4341a"; - reg = <0>; - spi-max-frequency = <6000000>; - }; diff --git a/Documentation/devicetree/bindings/sound/cs4349.txt b/Documentation/devicetree/bindings/sound/cs4349.txt deleted file mode 100644 index 54c117b59dba..000000000000 --- a/Documentation/devicetree/bindings/sound/cs4349.txt +++ /dev/null @@ -1,19 +0,0 @@ -CS4349 audio CODEC - -Required properties: - - - compatible : "cirrus,cs4349" - - - reg : the I2C address of the device for I2C - -Optional properties: - - - reset-gpios : a GPIO spec for the reset pin. - -Example: - -codec: cs4349@48 { - compatible = "cirrus,cs4349"; - reg = <0x48>; - reset-gpios = <&gpio 54 0>; -}; diff --git a/Documentation/devicetree/bindings/sound/da9055.txt b/Documentation/devicetree/bindings/sound/da9055.txt deleted file mode 100644 index 75c6338b6ae2..000000000000 --- a/Documentation/devicetree/bindings/sound/da9055.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Dialog DA9055 Audio CODEC - -DA9055 provides Audio CODEC support (I2C only). - -The Audio CODEC device in DA9055 has its own I2C address which is configurable, -so the device is instantiated separately from the PMIC (MFD) device. - -For details on accompanying PMIC I2C device, see the following: -Documentation/devicetree/bindings/mfd/da9055.txt - -Required properties: - - - compatible: "dlg,da9055-codec" - - reg: Specifies the I2C slave address - - -Example: - - codec: da9055-codec@1a { - compatible = "dlg,da9055-codec"; - reg = <0x1a>; - }; diff --git a/Documentation/devicetree/bindings/sound/maxim,max98090.yaml b/Documentation/devicetree/bindings/sound/maxim,max98090.yaml index 65e4c516912f..9df1296aacb7 100644 --- a/Documentation/devicetree/bindings/sound/maxim,max98090.yaml +++ b/Documentation/devicetree/bindings/sound/maxim,max98090.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Maxim Integrated MAX98090/MAX98091 audio codecs maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: | Pins on the device (for linking into audio routes): diff --git a/Documentation/devicetree/bindings/sound/maxim,max98095.yaml b/Documentation/devicetree/bindings/sound/maxim,max98095.yaml index 77544a9e1587..76ea4fe711de 100644 --- a/Documentation/devicetree/bindings/sound/maxim,max98095.yaml +++ b/Documentation/devicetree/bindings/sound/maxim,max98095.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Maxim Integrated MAX98095 audio codec maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> allOf: - $ref: dai-common.yaml# diff --git a/Documentation/devicetree/bindings/sound/maxim,max98504.yaml b/Documentation/devicetree/bindings/sound/maxim,max98504.yaml index 23f19a9d2c06..6d33bb4a98ae 100644 --- a/Documentation/devicetree/bindings/sound/maxim,max98504.yaml +++ b/Documentation/devicetree/bindings/sound/maxim,max98504.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Maxim Integrated MAX98504 class D mono speaker amplifier maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: Maxim Integrated MAX98504 speaker amplifier supports I2C control interface diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8189-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8189-afe-pcm.yaml new file mode 100644 index 000000000000..9c9f21652af9 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8189-afe-pcm.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt8189-afe-pcm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Audio Front End PCM controller for MT8189 + +maintainers: + - Darren Ye <darren.ye@mediatek.com> + - Cyril Chao <cyril.chao@mediatek.com> + +properties: + compatible: + const: mediatek,mt8189-afe-pcm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + memory-region: + maxItems: 1 + + mediatek,apmixedsys: + $ref: /schemas/types.yaml#/definitions/phandle + description: To set up the apll12 tuner + + power-domains: + maxItems: 1 + + clocks: + items: + - description: mux for audio intbus + - description: mux for audio engen1 + - description: mux for audio engen2 + - description: mux for audio h + - description: audio apll1 clock + - description: audio apll2 clock + - description: audio apll1 divide4 + - description: audio apll2 divide4 + - description: audio apll12 divide for i2sin0 + - description: audio apll12 divide for i2sin1 + - description: audio apll12 divide for i2sout0 + - description: audio apll12 divide for i2sout1 + - description: audio apll12 divide for fmi2s + - description: audio apll12 divide for tdmout mck + - description: audio apll12 divide for tdmout bck + - description: mux for audio apll1 + - description: mux for audio apll2 + - description: mux for i2sin0 mck + - description: mux for i2sin1 mck + - description: mux for i2sout0 mck + - description: mux for i2sout1 mck + - description: mux for fmi2s mck + - description: mux for tdmout mck + - description: 26m clock + - description: audio slv clock + - description: audio mst clock + - description: audio intbus clock + + clock-names: + items: + - const: top_aud_intbus + - const: top_aud_eng1 + - const: top_aud_eng2 + - const: top_aud_h + - const: apll1 + - const: apll2 + - const: apll1_d4 + - const: apll2_d4 + - const: apll12_div_i2sin0 + - const: apll12_div_i2sin1 + - const: apll12_div_i2sout0 + - const: apll12_div_i2sout1 + - const: apll12_div_fmi2s + - const: apll12_div_tdmout_m + - const: apll12_div_tdmout_b + - const: top_apll1 + - const: top_apll2 + - const: top_i2sin0 + - const: top_i2sin1 + - const: top_i2sout0 + - const: top_i2sout1 + - const: top_fmi2s + - const: top_dptx + - const: clk26m + - const: aud_slv_ck_peri + - const: aud_mst_ck_peri + - const: aud_intbus_ck_peri + +required: + - compatible + - reg + - interrupts + - memory-region + - power-domains + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + afe@11050000 { + compatible = "mediatek,mt8189-afe-pcm"; + reg = <0 0x11050000 0 0x10000>; + interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0>; + memory-region = <&afe_dma_mem_reserved>; + pinctrl-names = "default"; + pinctrl-0 = <&aud_pins_default>; + power-domains = <&scpsys 1>; //MT8189_POWER_DOMAIN_AUDIO + clocks = <&topckgen_clk 23>, //CLK_TOP_AUD_INTBUS_SEL + <&topckgen_clk 39>, //CLK_TOP_AUD_ENGEN1_SEL + <&topckgen_clk 40>, //CLK_TOP_AUD_ENGEN2_SEL + <&topckgen_clk 49>, //CLK_TOP_AUDIO_H_SEL + <&topckgen_clk 146>, //CLK_TOP_APLL1 + <&topckgen_clk 151>, //CLK_TOP_APLL2 + <&topckgen_clk 148>, //CLK_TOP_APLL1_D4 + <&topckgen_clk 153>, //CLK_TOP_APLL2_D4 + <&topckgen_clk 93>, //CLK_TOP_APLL12_CK_DIV_I2SIN0 + <&topckgen_clk 94>, //CLK_TOP_APLL12_CK_DIV_I2SIN1 + <&topckgen_clk 95>, //CLK_TOP_APLL12_CK_DIV_I2SOUT0 + <&topckgen_clk 96>, //CLK_TOP_APLL12_CK_DIV_I2SOUT1 + <&topckgen_clk 97>, //CLK_TOP_APLL12_CK_DIV_FMI2S + <&topckgen_clk 98>, //CLK_TOP_APLL12_CK_DIV_TDMOUT_M + <&topckgen_clk 99>, //CLK_TOP_APLL12_CK_DIV_TDMOUT_B + <&topckgen_clk 44>, //CLK_TOP_AUD_1_SEL + <&topckgen_clk 45>, //CLK_TOP_AUD_2_SEL + <&topckgen_clk 78>, //CLK_TOP_APLL_I2SIN0_MCK_SEL + <&topckgen_clk 79>, //CLK_TOP_APLL_I2SIN1_MCK_SEL + <&topckgen_clk 84>, //CLK_TOP_APLL_I2SOUT0_MCK_SEL + <&topckgen_clk 85>, //CLK_TOP_APLL_I2SOUT1_MCK_SEL + <&topckgen_clk 90>, //CLK_TOP_APLL_FMI2S_MCK_SEL + <&topckgen_clk 91>, //CLK_TOP_APLL_TDMOUT_MCK_SEL + <&topckgen_clk 191>, //CLK_TOP_TCK_26M_MX9 + <&pericfg_ao_clk 77>, //CLK_PERAO_AUDIO0 + <&pericfg_ao_clk 78>, //CLK_PERAO_AUDIO1 + <&pericfg_ao_clk 79>; //CLK_PERAO_AUDIO2 + clock-names = "top_aud_intbus", + "top_aud_eng1", + "top_aud_eng2", + "top_aud_h", + "apll1", + "apll2", + "apll1_d4", + "apll2_d4", + "apll12_div_i2sin0", + "apll12_div_i2sin1", + "apll12_div_i2sout0", + "apll12_div_i2sout1", + "apll12_div_fmi2s", + "apll12_div_tdmout_m", + "apll12_div_tdmout_b", + "top_apll1", + "top_apll2", + "top_i2sin0", + "top_i2sin1", + "top_i2sout0", + "top_i2sout1", + "top_fmi2s", + "top_dptx", + "clk26m", + "aud_slv_ck_peri", + "aud_mst_ck_peri", + "aud_intbus_ck_peri"; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8189-nau8825.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8189-nau8825.yaml new file mode 100644 index 000000000000..dd9ee0a3b292 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8189-nau8825.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt8189-nau8825.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT8189 ASoC sound card + +maintainers: + - Darren Ye <darren.ye@mediatek.com> + - Cyril Chao <cyril.chao@mediatek.com> + +allOf: + - $ref: sound-card-common.yaml# + +properties: + compatible: + enum: + - mediatek,mt8189-nau8825 + - mediatek,mt8189-rt5650 + - mediatek,mt8189-rt5682s + - mediatek,mt8189-rt5682i + - mediatek,mt8189-es8326 + + mediatek,platform: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of MT8189 ASoC platform. + +patternProperties: + "^dai-link-[0-9]+$": + type: object + description: + Container for dai-link level properties and CODEC sub-nodes. + + properties: + link-name: + description: + This property corresponds to the name of the BE dai-link to which + we are going to update parameters in this node. + enum: + - TDM_DPTX_BE + - I2SOUT0_BE + - I2SIN0_BE + - I2SOUT1_BE + + codec: + description: Holds subnode which indicates codec dai. + type: object + additionalProperties: false + + properties: + sound-dai: + minItems: 1 + maxItems: 2 + required: + - sound-dai + + dai-format: + description: audio format. + enum: + - i2s + - right_j + - left_j + - dsp_a + - dsp_b + + mediatek,clk-provider: + $ref: /schemas/types.yaml#/definitions/string + description: Indicates dai-link clock master. + enum: + - cpu + - codec + + additionalProperties: false + + required: + - link-name + +required: + - compatible + - mediatek,platform + +unevaluatedProperties: false + +examples: + - | + sound { + compatible = "mediatek,mt8189-nau8825"; + model = "mt8189_rt9123_8825"; + mediatek,platform = <&afe>; + dai-link-0 { + link-name = "I2SOUT1_BE"; + dai-format = "i2s"; + mediatek,clk-provider = "cpu"; + codec { + sound-dai = <&nau8825>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/sound/nuvoton,nau8540.yaml b/Documentation/devicetree/bindings/sound/nuvoton,nau8540.yaml deleted file mode 100644 index 7ccfbb8d8b04..000000000000 --- a/Documentation/devicetree/bindings/sound/nuvoton,nau8540.yaml +++ /dev/null @@ -1,40 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/nuvoton,nau8540.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Nuvoton Technology Corporation NAU85L40 Audio CODEC - -maintainers: - - John Hsu <KCHSU0@nuvoton.com> - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: nuvoton,nau8540 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - codec@1c { - compatible = "nuvoton,nau8540"; - reg = <0x1c>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/nuvoton,nau8810.yaml b/Documentation/devicetree/bindings/sound/nuvoton,nau8810.yaml deleted file mode 100644 index d9696f6c75ed..000000000000 --- a/Documentation/devicetree/bindings/sound/nuvoton,nau8810.yaml +++ /dev/null @@ -1,45 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/nuvoton,nau8810.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NAU8810/NAU8812/NAU8814 audio CODEC - -maintainers: - - David Lin <CTLIN0@nuvoton.com> - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - enum: - - nuvoton,nau8810 - - nuvoton,nau8812 - - nuvoton,nau8814 - - reg: - maxItems: 1 - - '#sound-dai-cells': - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - codec@1a { - #sound-dai-cells = <0>; - compatible = "nuvoton,nau8810"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml index b32f33214ba6..2ce4049f94ac 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml @@ -67,46 +67,72 @@ properties: $ref: audio-graph-port.yaml# unevaluatedProperties: false -if: - properties: - compatible: - contains: - const: nvidia,tegra210-admaif - -then: - properties: - dmas: - description: - DMA channel specifiers, equally divided for Tx and Rx. - minItems: 1 - maxItems: 20 - dma-names: - items: - pattern: "^[rt]x(10|[1-9])$" - description: - Should be "rx1", "rx2" ... "rx10" for DMA Rx channel - Should be "tx1", "tx2" ... "tx10" for DMA Tx channel - minItems: 1 - maxItems: 20 - interconnects: false - interconnect-names: false - iommus: false - -else: - properties: - dmas: - description: - DMA channel specifiers, equally divided for Tx and Rx. - minItems: 1 - maxItems: 40 - dma-names: - items: - pattern: "^[rt]x(1[0-9]|[1-9]|20)$" - description: - Should be "rx1", "rx2" ... "rx20" for DMA Rx channel - Should be "tx1", "tx2" ... "tx20" for DMA Tx channel - minItems: 1 - maxItems: 40 +allOf: + - if: + properties: + compatible: + contains: + const: nvidia,tegra210-admaif + then: + properties: + dmas: + description: + DMA channel specifiers, equally divided for Tx and Rx. + minItems: 1 + maxItems: 20 + dma-names: + items: + pattern: "^[rt]x(10|[1-9])$" + description: + Should be "rx1", "rx2" ... "rx10" for DMA Rx channel + Should be "tx1", "tx2" ... "tx10" for DMA Tx channel + minItems: 1 + maxItems: 20 + interconnects: false + interconnect-names: false + iommus: false + + - if: + properties: + compatible: + contains: + const: nvidia,tegra186-admaif + then: + properties: + dmas: + description: + DMA channel specifiers, equally divided for Tx and Rx. + minItems: 1 + maxItems: 40 + dma-names: + items: + pattern: "^[rt]x(1[0-9]|[1-9]|20)$" + description: + Should be "rx1", "rx2" ... "rx20" for DMA Rx channel + Should be "tx1", "tx2" ... "tx20" for DMA Tx channel + minItems: 1 + maxItems: 40 + + - if: + properties: + compatible: + contains: + const: nvidia,tegra264-admaif + then: + properties: + dmas: + description: + DMA channel specifiers, equally divided for Tx and Rx. + minItems: 1 + maxItems: 64 + dma-names: + items: + pattern: "^[rt]x(3[0-2]|[1-2][0-9]|[1-9])$" + description: + Should be "rx1", "rx2" ... "rx32" for DMA Rx channel + Should be "tx1", "tx2" ... "tx32" for DMA Tx channel + minItems: 1 + maxItems: 64 required: - compatible diff --git a/Documentation/devicetree/bindings/sound/nxp,tfa9879.yaml b/Documentation/devicetree/bindings/sound/nxp,tfa9879.yaml deleted file mode 100644 index df26248573ad..000000000000 --- a/Documentation/devicetree/bindings/sound/nxp,tfa9879.yaml +++ /dev/null @@ -1,44 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/nxp,tfa9879.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP TFA9879 class-D audio amplifier - -maintainers: - - Peter Rosin <peda@axentia.se> - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: nxp,tfa9879 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - - '#sound-dai-cells' - -unevaluatedProperties: false - -examples: - - | - i2c1 { - #address-cells = <1>; - #size-cells = <0>; - amplifier@6c { - compatible = "nxp,tfa9879"; - reg = <0x6c>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - #sound-dai-cells = <0>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/nxp,uda1342.yaml b/Documentation/devicetree/bindings/sound/nxp,uda1342.yaml deleted file mode 100644 index 71c6a5a2f5bc..000000000000 --- a/Documentation/devicetree/bindings/sound/nxp,uda1342.yaml +++ /dev/null @@ -1,42 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/nxp,uda1342.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP uda1342 audio CODECs - -maintainers: - - Binbin Zhou <zhoubinbin@loongson.cn> - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: nxp,uda1342 - - reg: - maxItems: 1 - - '#sound-dai-cells': - const: 0 - -required: - - compatible - - reg - - '#sound-dai-cells' - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - codec@1a { - compatible = "nxp,uda1342"; - reg = <0x1a>; - #sound-dai-cells = <0>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/pcm1789.txt b/Documentation/devicetree/bindings/sound/pcm1789.txt deleted file mode 100644 index 3c74ed220ac2..000000000000 --- a/Documentation/devicetree/bindings/sound/pcm1789.txt +++ /dev/null @@ -1,22 +0,0 @@ -Texas Instruments pcm1789 DT bindings - -PCM1789 is a simple audio codec that can be connected via -I2C or SPI. Currently, only I2C bus is supported. - -Required properties: - - - compatible: "ti,pcm1789" - -Required properties on I2C: - - - reg: the I2C address - - reset-gpios: GPIO to control the RESET pin - -Examples: - - audio-codec@4c { - compatible = "ti,pcm1789"; - reg = <0x4c>; - reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; - #sound-dai-cells = <0>; - }; diff --git a/Documentation/devicetree/bindings/sound/pcm179x.txt b/Documentation/devicetree/bindings/sound/pcm179x.txt deleted file mode 100644 index 436c2b247693..000000000000 --- a/Documentation/devicetree/bindings/sound/pcm179x.txt +++ /dev/null @@ -1,27 +0,0 @@ -Texas Instruments pcm179x DT bindings - -This driver supports both the I2C and SPI bus. - -Required properties: - - - compatible: "ti,pcm1792a" - -For required properties on SPI, please consult -Documentation/devicetree/bindings/spi/spi-bus.txt - -Required properties on I2C: - - - reg: the I2C address - - -Examples: - - codec_spi: 1792a@0 { - compatible = "ti,pcm1792a"; - spi-max-frequency = <600000>; - }; - - codec_i2c: 1792a@4c { - compatible = "ti,pcm1792a"; - reg = <0x4c>; - }; diff --git a/Documentation/devicetree/bindings/sound/pcm186x.txt b/Documentation/devicetree/bindings/sound/pcm186x.txt deleted file mode 100644 index 1087f4855980..000000000000 --- a/Documentation/devicetree/bindings/sound/pcm186x.txt +++ /dev/null @@ -1,42 +0,0 @@ -Texas Instruments PCM186x Universal Audio ADC - -These devices support both I2C and SPI (configured with pin strapping -on the board). - -Required properties: - - - compatible : "ti,pcm1862", - "ti,pcm1863", - "ti,pcm1864", - "ti,pcm1865" - - - reg : The I2C address of the device for I2C, the chip select - number for SPI. - - - avdd-supply: Analog core power supply (3.3v) - - dvdd-supply: Digital core power supply - - iovdd-supply: Digital IO power supply - See regulator/regulator.txt for more information - -CODEC input pins: - * VINL1 - * VINR1 - * VINL2 - * VINR2 - * VINL3 - * VINR3 - * VINL4 - * VINR4 - -The pins can be used in referring sound node's audio-routing property. - -Example: - - pcm186x: audio-codec@4a { - compatible = "ti,pcm1865"; - reg = <0x4a>; - - avdd-supply = <®_3v3_analog>; - dvdd-supply = <®_3v3>; - iovdd-supply = <®_1v8>; - }; diff --git a/Documentation/devicetree/bindings/sound/pcm5102a.txt b/Documentation/devicetree/bindings/sound/pcm5102a.txt deleted file mode 100644 index c63ab0b6ee19..000000000000 --- a/Documentation/devicetree/bindings/sound/pcm5102a.txt +++ /dev/null @@ -1,13 +0,0 @@ -PCM5102a audio CODECs - -These devices does not use I2C or SPI. - -Required properties: - - - compatible : set as "ti,pcm5102a" - -Examples: - - pcm5102a: pcm5102a { - compatible = "ti,pcm5102a"; - }; diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml index 92f95eb74b19..2eed2277511f 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml @@ -14,12 +14,14 @@ properties: oneOf: - enum: - qcom,sc7280-lpass-rx-macro + - qcom,sm6115-lpass-rx-macro - qcom,sm8250-lpass-rx-macro - qcom,sm8450-lpass-rx-macro - qcom,sm8550-lpass-rx-macro - qcom,sc8280xp-lpass-rx-macro - items: - enum: + - qcom,kaanapali-lpass-rx-macro - qcom,sm8650-lpass-rx-macro - qcom,sm8750-lpass-rx-macro - qcom,x1e80100-lpass-rx-macro @@ -84,6 +86,23 @@ allOf: properties: compatible: enum: + - qcom,sm6115-lpass-rx-macro + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: mclk + - const: npl + - const: dcodec + - const: fsgen + + - if: + properties: + compatible: + enum: - qcom,sc8280xp-lpass-rx-macro - qcom,sm8250-lpass-rx-macro - qcom,sm8450-lpass-rx-macro diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml index 914798a89878..e5e65e226a02 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml @@ -21,6 +21,7 @@ properties: - qcom,sc8280xp-lpass-tx-macro - items: - enum: + - qcom,kaanapali-lpass-tx-macro - qcom,sm8650-lpass-tx-macro - qcom,sm8750-lpass-tx-macro - qcom,x1e80100-lpass-tx-macro diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml index 1c0d78af3c05..5c42b2b323ee 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml @@ -14,6 +14,7 @@ properties: oneOf: - enum: - qcom,sc7280-lpass-va-macro + - qcom,sm6115-lpass-va-macro - qcom,sm8250-lpass-va-macro - qcom,sm8450-lpass-va-macro - qcom,sm8550-lpass-va-macro @@ -21,6 +22,7 @@ properties: - items: - enum: - qcom,glymur-lpass-va-macro + - qcom,kaanapali-lpass-va-macro - qcom,sm8650-lpass-va-macro - qcom,sm8750-lpass-va-macro - qcom,x1e80100-lpass-va-macro @@ -41,11 +43,7 @@ properties: clock-names: minItems: 1 - items: - - const: mclk - - const: macro - - const: dcodec - - const: npl + maxItems: 4 clock-output-names: maxItems: 1 @@ -90,29 +88,48 @@ allOf: clocks: maxItems: 1 clock-names: - maxItems: 1 + items: + - const: mclk else: properties: clocks: minItems: 3 maxItems: 3 clock-names: - minItems: 3 - maxItems: 3 - + items: + - const: mclk + - const: macro + - const: dcodec - if: properties: compatible: contains: - const: qcom,sm8250-lpass-va-macro + const: qcom,sm6115-lpass-va-macro then: properties: clocks: minItems: 3 maxItems: 3 clock-names: + items: + - const: mclk + - const: dcodec + - const: npl + - if: + properties: + compatible: + contains: + const: qcom,sm8250-lpass-va-macro + then: + properties: + clocks: minItems: 3 maxItems: 3 + clock-names: + items: + - const: mclk + - const: macro + - const: dcodec - if: properties: @@ -127,8 +144,11 @@ allOf: minItems: 4 maxItems: 4 clock-names: - minItems: 4 - maxItems: 4 + items: + - const: mclk + - const: macro + - const: dcodec + - const: npl - if: properties: @@ -142,8 +162,10 @@ allOf: minItems: 3 maxItems: 3 clock-names: - minItems: 3 - maxItems: 3 + items: + - const: mclk + - const: macro + - const: dcodec unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml index b6f5ba5d1320..d5f22b5cf021 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml @@ -21,6 +21,7 @@ properties: - items: - enum: - qcom,glymur-lpass-wsa-macro + - qcom,kaanapali-lpass-wsa-macro - qcom,sm8650-lpass-wsa-macro - qcom,sm8750-lpass-wsa-macro - qcom,x1e80100-lpass-wsa-macro diff --git a/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml b/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml index 3f11d2e183e1..26fe8cc66b3c 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Audio Device Manager (Q6ADM) routing maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: diff --git a/Documentation/devicetree/bindings/sound/qcom,q6adm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6adm.yaml index fe14a97ea616..3c32c5b0fad8 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6adm.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6adm.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Audio Device Manager (Q6ADM) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> allOf: diff --git a/Documentation/devicetree/bindings/sound/qcom,q6afe.yaml b/Documentation/devicetree/bindings/sound/qcom,q6afe.yaml index 268f7073d797..4624b3d461d5 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6afe.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6afe.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Audio FrontEnd (Q6AFE) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> allOf: diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml index 894e653d37d7..2fb95544db8b 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm DSP LPASS (Low Power Audio SubSystem) Audio Ports maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> allOf: diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml index ef1965aca254..ec06769a2b63 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Audio Process Manager (Q6APM) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> allOf: diff --git a/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml b/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml index ce811942a9f1..47a105a97ecf 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Audio Stream Manager (Q6ASM) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: diff --git a/Documentation/devicetree/bindings/sound/qcom,q6asm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6asm.yaml index cb49f9667cca..a6f88ce92299 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6asm.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6asm.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Audio Stream Manager (Q6ASM) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> allOf: diff --git a/Documentation/devicetree/bindings/sound/qcom,q6core.yaml b/Documentation/devicetree/bindings/sound/qcom,q6core.yaml index e240712de9ca..8642ef9f9142 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6core.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6core.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Audio Core (Q6Core) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> allOf: diff --git a/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml index f6dbb1267bfe..3eafe189e699 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Proxy Resource Manager (Q6PRM) maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> allOf: diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml index b49a920af704..15f38622b98b 100644 --- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml @@ -23,6 +23,7 @@ properties: - const: qcom,sdm845-sndcard - items: - enum: + - qcom,kaanapali-sndcard - qcom,sm8550-sndcard - qcom,sm8650-sndcard - qcom,sm8750-sndcard @@ -38,6 +39,7 @@ properties: - qcom,qcs8275-sndcard - qcom,qcs9075-sndcard - qcom,qcs9100-sndcard + - qcom,qrb2210-sndcard - qcom,qrb4210-rb2-sndcard - qcom,qrb5165-rb5-sndcard - qcom,sc7180-qdsp6-sndcard diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml index a65b1d1d5fdd..3a7334e41fd6 100644 --- a/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml @@ -132,7 +132,7 @@ properties: $ref: /schemas/gpio/qcom,wcd934x-gpio.yaml# patternProperties: - "^.*@[0-9a-f]+$": + "@[0-9a-f]+$": type: object additionalProperties: true description: | diff --git a/Documentation/devicetree/bindings/sound/qcom,wsa8840.yaml b/Documentation/devicetree/bindings/sound/qcom,wsa8840.yaml index 83e0360301e1..866c5e780fb0 100644 --- a/Documentation/devicetree/bindings/sound/qcom,wsa8840.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,wsa8840.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm WSA8840/WSA8845/WSA8845H smart speaker amplifier maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> description: diff --git a/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml b/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml index 7bb6c5dff786..9435f395403a 100644 --- a/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml +++ b/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml @@ -135,7 +135,6 @@ properties: the direction (input/output) needs to be dynamically adjusted. type: boolean - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml index 5cdb8bcc687b..52e3f1f900c4 100644 --- a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml +++ b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml @@ -8,10 +8,10 @@ title: Rockchip rk3328 internal codec maintainers: - Heiko Stuebner <heiko@sntech.de> + allOf: - $ref: dai-common.yaml# - properties: compatible: const: rockchip,rk3328-codec diff --git a/Documentation/devicetree/bindings/sound/samsung,tm2.yaml b/Documentation/devicetree/bindings/sound/samsung,tm2.yaml index cbc7ba37362a..67586ba3e0a0 100644 --- a/Documentation/devicetree/bindings/sound/samsung,tm2.yaml +++ b/Documentation/devicetree/bindings/sound/samsung,tm2.yaml @@ -30,7 +30,6 @@ properties: - items: - description: Phandle to the HDMI transmitter node. - samsung,audio-routing: description: | List of the connections between audio components; each entry is diff --git a/Documentation/devicetree/bindings/sound/spacemit,k1-i2s.yaml b/Documentation/devicetree/bindings/sound/spacemit,k1-i2s.yaml new file mode 100644 index 000000000000..55bd0b307d22 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/spacemit,k1-i2s.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/spacemit,k1-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: K1 I2S controller + +description: + The I2S bus (Inter-IC sound bus) is a serial link for digital + audio data transfer between devices in the system. + +maintainers: + - Troy Mitchell <troy.mitchell@linux.spacemit.com> + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + const: spacemit,k1-i2s + + reg: + maxItems: 1 + + clocks: + items: + - description: clock for I2S sysclk + - description: clock for I2S bclk + - description: clock for I2S bus + - description: clock for I2S controller + + clock-names: + items: + - const: sysclk + - const: bclk + - const: bus + - const: func + + dmas: + minItems: 1 + maxItems: 2 + + dma-names: + minItems: 1 + items: + - const: tx + - const: rx + + resets: + maxItems: 1 + + port: + $ref: audio-graph-port.yaml# + unevaluatedProperties: false + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - dmas + - dma-names + - resets + - "#sound-dai-cells" + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/spacemit,k1-syscon.h> + i2s@d4026000 { + compatible = "spacemit,k1-i2s"; + reg = <0xd4026000 0x30>; + clocks = <&syscon_mpmu CLK_I2S_SYSCLK>, + <&syscon_mpmu CLK_I2S_BCLK>, + <&syscon_apbc CLK_SSPA0_BUS>, + <&syscon_apbc CLK_SSPA0>; + clock-names = "sysclk", "bclk", "bus", "func"; + dmas = <&pdma0 21>, <&pdma0 22>; + dma-names = "tx", "rx"; + resets = <&syscon_apbc RESET_SSPA0>; + #sound-dai-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/sound/ti,pcm1862.yaml b/Documentation/devicetree/bindings/sound/ti,pcm1862.yaml new file mode 100644 index 000000000000..0f0e254a2420 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ti,pcm1862.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/ti,pcm1862.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments PCM186x Universal Audio ADC + +maintainers: + - Ranganath V N <vnranganath.20@gmail.com> + +description: | + The Texas Instruments PCM186x family are multi-channel audio ADCs + that support both I2C and SPI control interfaces, selected by + pin strapping. These devices include on-chip programmable gain + amplifiers and support differential or single-ended analog inputs. + + CODEC input pins: + * VINL1 + * VINR1 + * VINL2 + * VINR2 + * VINL3 + * VINR3 + * VINL4 + * VINR4 + + The pins can be used in referring sound node's audio-routing property. + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + - ti,pcm1862 + - ti,pcm1863 + - ti,pcm1864 + - ti,pcm1865 + + reg: + maxItems: 1 + + avdd-supply: true + + dvdd-supply: true + + iovdd-supply: true + + '#sound-dai-cells': + const: 0 + +required: + - compatible + - reg + - avdd-supply + - dvdd-supply + - iovdd-supply + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + audio-codec@4a { + compatible = "ti,pcm1865"; + reg = <0x4a>; + + avdd-supply = <®_3v3_analog>; + dvdd-supply = <®_3v3>; + iovdd-supply = <®_1v8>; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/ti,tas2781.yaml b/Documentation/devicetree/bindings/sound/ti,tas2781.yaml index 7f84f506013c..f3a5638f4239 100644 --- a/Documentation/devicetree/bindings/sound/ti,tas2781.yaml +++ b/Documentation/devicetree/bindings/sound/ti,tas2781.yaml @@ -24,21 +24,26 @@ description: | Instruments Smart Amp speaker protection algorithm. The integrated speaker voltage and current sense provides for real time monitoring of loudspeaker behavior. - The TAS5802/TAS5815/TAS5825/TAS5827/TAS5828 is a stereo, digital input - Class-D audio amplifier optimized for efficiently driving high peak - power into small loudspeakers. An integrated on-chip DSP supports - Texas Instruments Smart Amp speaker protection algorithm. + The TAS5802/TAS5815/TAS5822/TAS5825/TAS5827/TAS5828 is a stereo, + digital input Class-D audio amplifier optimized for efficiently driving + high peak power into small loudspeakers. An integrated on-chip DSP + supports Texas Instruments Smart Amp speaker protection algorithm. Specifications about the audio amplifier can be found at: https://www.ti.com/lit/gpn/tas2120 https://www.ti.com/lit/gpn/tas2320 https://www.ti.com/lit/gpn/tas2563 https://www.ti.com/lit/gpn/tas2572 + https://www.ti.com/lit/gpn/tas2574 https://www.ti.com/lit/gpn/tas2781 + https://www.ti.com/lit/gpn/tas5806m + https://www.ti.com/lit/gpn/tas5806md https://www.ti.com/lit/gpn/tas5815 + https://www.ti.com/lit/gpn/tas5822m https://www.ti.com/lit/gpn/tas5825m https://www.ti.com/lit/gpn/tas5827 https://www.ti.com/lit/gpn/tas5828m + https://www.ti.com/lit/gpn/tas5830 properties: compatible: @@ -57,12 +62,18 @@ properties: ti,tas2563: 6.1-W Boosted Class-D Audio Amplifier With Integrated DSP and IV Sense, 16/20/24/32bit stereo I2S or multichannel TDM. + ti,tas2568: 5.3-W Digital Input Smart Amp with I/V Sense and Integrated + 10.75-V Class-H Boost + ti,tas2570: 5.8-W Digital Input smart amp with I/V sense and integrated 11-V Class-H Boost ti,tas2572: 6.6-W Digital Input smart amp with I/V sense and integrated 13-V Class-H Boost + ti,tas2574: 8.5-W Digital Input smart amp with I/V sense and integrated + 15-V Class-H Boost + ti,tas2781: 24-V Class-D Amplifier with Real Time Integrated Speaker Protection and Audio Processing, 16/20/24/32bit stereo I2S or multichannel TDM. @@ -71,9 +82,20 @@ properties: Audio Amplifier with 96-Khz Extended Processing and Low Idle Power Dissipation. + ti,tas5806m: 23-W, Inductor-Less, Digital Input, Stereo, Closed-Loop + Class-D Audio Amplifier with Enhanced Processing and Low Power + Dissipation. + + ti,tas5806md: 23-W, Inductor-Less, Digital Input, Stereo, Closed-Loop + Class-D Audio Amplifier with Enhanced Processing and DirectPath(TM) + HP Driver + ti,tas5815: 30-W, Digital Input, Stereo, Closed-loop Class-D Audio Amplifier with 96 kHz Enhanced Processing + ti,tas5822: 35-W, Digital Input, Stereo, Closed-Loop Class-D Audio + Amplifier with 96 kHz Enhanced Processing + ti,tas5825: 38-W Stereo, Inductor-Less, Digital Input, Closed-Loop 4.5V to 26.4V Class-D Audio Amplifier with 192-kHz Extended Audio Processing. @@ -82,6 +104,9 @@ properties: ti,tas5828: 50-W Stereo, Digital Input, High Efficiency Closed-Loop Class-D Amplifier with Hybrid-Pro Algorithm + + ti,tas5830: 65-W Stereo, Digital Input, High Efficiency Closed-Loop + Class-D Amplifier with Class-H Algorithm oneOf: - items: - enum: @@ -90,13 +115,19 @@ properties: - ti,tas2120 - ti,tas2320 - ti,tas2563 + - ti,tas2568 - ti,tas2570 - ti,tas2572 + - ti,tas2574 - ti,tas5802 + - ti,tas5806m + - ti,tas5806md - ti,tas5815 + - ti,tas5822 - ti,tas5825 - ti,tas5827 - ti,tas5828 + - ti,tas5830 - const: ti,tas2781 - enum: - ti,tas2781 @@ -132,6 +163,8 @@ allOf: - ti,tas2118 - ti,tas2120 - ti,tas2320 + - ti,tas2568 + - ti,tas2574 then: properties: reg: @@ -212,8 +245,25 @@ allOf: compatible: contains: enum: + - ti,tas5806m + - ti,tas5806md + - ti,tas5822 + then: + properties: + reg: + maxItems: 4 + items: + minimum: 0x2c + maximum: 0x2f + + - if: + properties: + compatible: + contains: + enum: - ti,tas5827 - ti,tas5828 + - ti,tas5830 then: properties: reg: diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320dac3100.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320dac3100.yaml index 85e937e34962..10299064cbc6 100644 --- a/Documentation/devicetree/bindings/sound/ti,tlv320dac3100.yaml +++ b/Documentation/devicetree/bindings/sound/ti,tlv320dac3100.yaml @@ -84,7 +84,6 @@ properties: description: gpio pin number used for codec reset deprecated: true - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/sound/trivial-codec.yaml b/Documentation/devicetree/bindings/sound/trivial-codec.yaml new file mode 100644 index 000000000000..9a35dfb17349 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/trivial-codec.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/trivial-codec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Trivial Audio Codec + +maintainers: + - Rob Herring <robh@kernel.org> + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + enum: + # Analog Devices SSM2602 I2S audio CODEC devices + - adi,ssm2602 + - adi,ssm2603 + - adi,ssm2604 + - adi,ssm3515 + # Cirrus Logic CS4265 audio DAC + - cirrus,cs4265 + - cirrus,cs4341a + - cirrus,cs4349 + - dlg,da9055-codec + # Nuvoton Technology Corporation NAU85L40 Audio CODEC + - nuvoton,nau8540 + - nuvoton,nau8810 + - nuvoton,nau8812 + - nuvoton,nau8814 + # NXP TFA9879 class-D audio amplifier + - nxp,tfa9879 + - nxp,uda1342 + - sdw3019f836300 + - ti,pcm1789 + - ti,pcm1792a + - ti,pcm5102a + - wlf,wm8510 + - wlf,wm8523 + - wlf,wm8580 + - wlf,wm8581 + - wlf,wm8711 + - wlf,wm8728 + - wlf,wm8737 + - wlf,wm8750 + - wlf,wm8753 + - wlf,wm8770 + - wlf,wm8776 + - wlf,wm8961 + - wlf,wm8974 + - wlf,wm8987 + + reg: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + + reset-gpios: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + codec@1a { + compatible = "wlf,wm8523"; + reg = <0x1a>; + }; + }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8510.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8510.yaml deleted file mode 100644 index 6d12b0ac37e2..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8510.yaml +++ /dev/null @@ -1,41 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8510.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8510 audio CODEC - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: wlf,wm8510 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - codec@1a { - compatible = "wlf,wm8510"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8523.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8523.yaml deleted file mode 100644 index decc395bb873..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8523.yaml +++ /dev/null @@ -1,40 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8523.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8523 audio CODEC - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: wlf,wm8523 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - codec@1a { - compatible = "wlf,wm8523"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8580.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8580.yaml deleted file mode 100644 index 2f27852cdc20..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8580.yaml +++ /dev/null @@ -1,42 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8580.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8580 and WM8581 audio CODEC - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - enum: - - wlf,wm8580 - - wlf,wm8581 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - codec@1a { - compatible = "wlf,wm8580"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8711.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8711.yaml deleted file mode 100644 index ecaac2818b44..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8711.yaml +++ /dev/null @@ -1,40 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8711.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8711 audio CODEC - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: wlf,wm8711 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - codec@1a { - compatible = "wlf,wm8711"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8728.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8728.yaml deleted file mode 100644 index fc89475a051e..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8728.yaml +++ /dev/null @@ -1,40 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8728.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8728 audio CODEC - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: wlf,wm8728 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - codec@1a { - compatible = "wlf,wm8728"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8737.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8737.yaml deleted file mode 100644 index 12d8765726d8..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8737.yaml +++ /dev/null @@ -1,40 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8737.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8737 audio CODEC - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: wlf,wm8737 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - codec@1a { - compatible = "wlf,wm8737"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8750.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8750.yaml deleted file mode 100644 index 96859e38315b..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8750.yaml +++ /dev/null @@ -1,42 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8750.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8750 and WM8987 audio CODECs - -description: | - These devices support both I2C and SPI (configured with pin strapping - on the board). - -maintainers: - - Mark Brown <broonie@kernel.org> - -properties: - compatible: - enum: - - wlf,wm8750 - - wlf,wm8987 - - reg: - description: - The I2C address of the device for I2C, the chip select number for SPI - maxItems: 1 - -additionalProperties: false - -required: - - reg - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - codec@1a { - compatible = "wlf,wm8750"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8753.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8753.yaml deleted file mode 100644 index 9eebe7d7f0b7..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8753.yaml +++ /dev/null @@ -1,62 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8753.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8753 audio CODEC - -description: | - Pins on the device (for linking into audio routes): - * LOUT1 - * LOUT2 - * ROUT1 - * ROUT2 - * MONO1 - * MONO2 - * OUT3 - * OUT4 - * LINE1 - * LINE2 - * RXP - * RXN - * ACIN - * ACOP - * MIC1N - * MIC1 - * MIC2N - * MIC2 - * Mic Bias - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: wlf,wm8753 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - codec@1a { - compatible = "wlf,wm8753"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8776.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8776.yaml deleted file mode 100644 index 7bbc96ee81be..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8776.yaml +++ /dev/null @@ -1,41 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8776.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8776 audio CODEC - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: wlf,wm8776 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - codec@1a { - compatible = "wlf,wm8776"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8903.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8903.yaml index 4cfa66f62681..089b67384797 100644 --- a/Documentation/devicetree/bindings/sound/wlf,wm8903.yaml +++ b/Documentation/devicetree/bindings/sound/wlf,wm8903.yaml @@ -75,7 +75,6 @@ properties: DCVDD-supply: description: Digital core supply regulator for the DCVDD pin. - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8961.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8961.yaml deleted file mode 100644 index f58078545569..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8961.yaml +++ /dev/null @@ -1,43 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8961.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Wolfson WM8961 Ultra-Low Power Stereo CODEC - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: wlf,wm8961 - - reg: - maxItems: 1 - - '#sound-dai-cells': - const: 0 - -required: - - compatible - - reg - - '#sound-dai-cells' - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - wm8961: codec@4a { - compatible = "wlf,wm8961"; - reg = <0x4a>; - #sound-dai-cells = <0>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8974.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8974.yaml deleted file mode 100644 index d27300207c67..000000000000 --- a/Documentation/devicetree/bindings/sound/wlf,wm8974.yaml +++ /dev/null @@ -1,41 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/wlf,wm8974.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: WM8974 audio CODEC - -maintainers: - - patches@opensource.cirrus.com - -allOf: - - $ref: dai-common.yaml# - -properties: - compatible: - const: wlf,wm8974 - - reg: - maxItems: 1 - - "#sound-dai-cells": - const: 0 - -required: - - compatible - - reg - -unevaluatedProperties: false - -examples: - - | - i2c { - #address-cells = <1>; - #size-cells = <0>; - - codec@1a { - compatible = "wlf,wm8974"; - reg = <0x1a>; - }; - }; diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8994.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8994.yaml index 8f045de02850..0db04a90ac6b 100644 --- a/Documentation/devicetree/bindings/sound/wlf,wm8994.yaml +++ b/Documentation/devicetree/bindings/sound/wlf,wm8994.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Wolfson WM1811/WM8994/WM8958 audio codecs maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> - patches@opensource.cirrus.com description: | diff --git a/Documentation/devicetree/bindings/sound/wm8770.txt b/Documentation/devicetree/bindings/sound/wm8770.txt deleted file mode 100644 index cac762a1105d..000000000000 --- a/Documentation/devicetree/bindings/sound/wm8770.txt +++ /dev/null @@ -1,16 +0,0 @@ -WM8770 audio CODEC - -This device supports SPI. - -Required properties: - - - compatible : "wlf,wm8770" - - - reg : the chip select number. - -Example: - -wm8770: codec@1 { - compatible = "wlf,wm8770"; - reg = <1>; -}; diff --git a/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml b/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml index b820c5613dcc..855aa08995b9 100644 --- a/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml +++ b/Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml @@ -14,7 +14,12 @@ allOf: properties: compatible: - const: airoha,en7581-snand + oneOf: + - const: airoha,en7581-snand + - items: + - enum: + - airoha,en7523-snand + - const: airoha,en7581-snand reg: items: diff --git a/Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml b/Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml index 57d932af4506..80e542624cc6 100644 --- a/Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml +++ b/Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml @@ -12,7 +12,7 @@ maintainers: description: | This binding describes the Aspeed Static Memory Controllers (FMC and - SPI) of the AST2400, AST2500 and AST2600 SOCs. + SPI) of the AST2400, AST2500, AST2600 and AST2700 SOCs. allOf: - $ref: spi-controller.yaml# @@ -20,6 +20,8 @@ allOf: properties: compatible: enum: + - aspeed,ast2700-fmc + - aspeed,ast2700-spi - aspeed,ast2600-fmc - aspeed,ast2600-spi - aspeed,ast2500-fmc diff --git a/Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml index f2dd20370dbb..1d10cfbad86c 100644 --- a/Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml +++ b/Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml @@ -9,9 +9,6 @@ title: Freescale Quad Serial Peripheral Interface (QuadSPI) maintainers: - Han Xu <han.xu@nxp.com> -allOf: - - $ref: spi-controller.yaml# - properties: compatible: oneOf: @@ -22,6 +19,7 @@ properties: - fsl,imx6ul-qspi - fsl,ls1021a-qspi - fsl,ls2080a-qspi + - spacemit,k1-qspi - items: - enum: - fsl,ls1043a-qspi @@ -54,6 +52,11 @@ properties: - const: qspi_en - const: qspi + resets: + items: + - description: SoC QSPI reset + - description: SoC QSPI bus reset + required: - compatible - reg @@ -62,6 +65,18 @@ required: - clocks - clock-names +allOf: + - $ref: spi-controller.yaml# + - if: + properties: + compatible: + not: + contains: + const: spacemit,k1-qspi + then: + properties: + resets: false + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml index 62a568bdbfa0..636338d24bdf 100644 --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml @@ -21,11 +21,13 @@ properties: - microchip,mpfs-qspi - microchip,pic64gx-qspi - const: microchip,coreqspi-rtl-v2 - - const: microchip,coreqspi-rtl-v2 # FPGA QSPI + - enum: + - microchip,coreqspi-rtl-v2 # FPGA QSPI + - microchip,corespi-rtl-v5 # FPGA CoreSPI + - microchip,mpfs-spi - items: - const: microchip,pic64gx-spi - const: microchip,mpfs-spi - - const: microchip,mpfs-spi reg: maxItems: 1 @@ -39,6 +41,45 @@ properties: clocks: maxItems: 1 + microchip,apb-datawidth: + description: APB bus data width in bits. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [8, 16, 32] + default: 8 + + microchip,frame-size: + description: | + Number of bits per SPI frame, as configured in Libero. + In Motorola and TI modes, this corresponds directly + to the requested frame size. For NSC mode this is set + to 9 + the required data frame size. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 4 + maximum: 32 + default: 8 + + microchip,protocol-configuration: + description: CoreSPI protocol selection. Determines operating mode + $ref: /schemas/types.yaml#/definitions/string + enum: + - motorola + - ti + - nsc + default: motorola + + microchip,motorola-mode: + description: Motorola SPI mode selection + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + default: 3 + + microchip,ssel-active: + description: | + Keep SSEL asserted between frames when using the Motorola protocol. + When present, the controller keeps SSEL active across contiguous + transfers and deasserts only when the overall transfer completes. + type: boolean + required: - compatible - reg @@ -71,6 +112,31 @@ allOf: num-cs: maximum: 1 + - if: + properties: + compatible: + contains: + const: microchip,corespi-rtl-v5 + then: + properties: + num-cs: + minimum: 1 + maximum: 8 + default: 8 + + fifo-depth: + minimum: 1 + maximum: 32 + default: 4 + + else: + properties: + microchip,apb-datawidth: false + microchip,frame-size: false + microchip,protocol-configuration: false + microchip,motorola-mode: false + microchip,ssel-active: false + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt deleted file mode 100644 index a4e72e52af59..000000000000 --- a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt +++ /dev/null @@ -1,36 +0,0 @@ -Nuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver - -Nuvoton NPCM7xx SOC support two PSPI channels. - -Required properties: - - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX. - "nuvoton,npcm845-pspi" for Arbel NPCM8XX. - - #address-cells : should be 1. see spi-bus.txt - - #size-cells : should be 0. see spi-bus.txt - - specifies physical base address and size of the register. - - interrupts : contain PSPI interrupt. - - clocks : phandle of PSPI reference clock. - - clock-names: Should be "clk_apb5". - - pinctrl-names : a pinctrl state named "default" must be defined. - - pinctrl-0 : phandle referencing pin configuration of the device. - - resets : phandle to the reset control for this device. - - cs-gpios: Specifies the gpio pins to be used for chipselects. - See: Documentation/devicetree/bindings/spi/spi-bus.txt - -Optional properties: -- clock-frequency : Input clock frequency to the PSPI block in Hz. - Default is 25000000 Hz. - -spi0: spi@f0200000 { - compatible = "nuvoton,npcm750-pspi"; - reg = <0xf0200000 0x1000>; - pinctrl-names = "default"; - pinctrl-0 = <&pspi1_pins>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk NPCM7XX_CLK_APB5>; - clock-names = "clk_apb5"; - resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1> - cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; -}; diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml new file mode 100644 index 000000000000..db0fb872020a --- /dev/null +++ b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/nuvoton,npcm-pspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NPCM Peripheral SPI (PSPI) Controller + +maintainers: + - Tomer Maimon <tmaimon77@gmail.com> + +allOf: + - $ref: spi-controller.yaml# + +description: + Nuvoton NPCM Peripheral Serial Peripheral Interface (PSPI) controller. + Nuvoton NPCM7xx SOC supports two PSPI channels. + Nuvoton NPCM8xx SOC support one PSPI channel. + +properties: + compatible: + enum: + - nuvoton,npcm750-pspi # Poleg NPCM7XX + - nuvoton,npcm845-pspi # Arbel NPCM8XX + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + description: PSPI reference clock. + + clock-names: + items: + - const: clk_apb5 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h> + #include "dt-bindings/gpio/gpio.h" + spi0: spi@f0200000 { + compatible = "nuvoton,npcm750-pspi"; + reg = <0xf0200000 0x1000>; + pinctrl-names = "default"; + pinctrl-0 = <&pspi1_pins>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk NPCM7XX_CLK_APB5>; + clock-names = "clk_apb5"; + resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>; + cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; + }; + diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml index d12c5a060ed0..edf399681d7a 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml @@ -9,7 +9,7 @@ title: GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interfac maintainers: - Andy Gross <agross@kernel.org> - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: The QUP v3 core is a GENI based AHB slave that provides a common data path diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml index cb1f15224b45..7d0571feb46d 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml @@ -25,6 +25,8 @@ properties: - items: - enum: - qcom,ipq5018-snand + - qcom,ipq5332-snand + - qcom,ipq5424-snand - const: qcom,ipq9574-snand - const: qcom,ipq9574-snand diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml index 88be13268962..7df21b15a0d4 100644 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml @@ -9,7 +9,7 @@ title: Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI) maintainers: - Andy Gross <agross@kernel.org> - Bjorn Andersson <bjorn.andersson@linaro.org> - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> description: The QUP core is an AHB slave that provides a common data path (an output FIFO diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml index ab27fefc3c3a..069557a587b5 100644 --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml @@ -9,12 +9,18 @@ title: Renesas RZ/V2H(P) Renesas Serial Peripheral Interface (RSPI) maintainers: - Fabrizio Castro <fabrizio.castro.jz@renesas.com> -allOf: - - $ref: spi-controller.yaml# - properties: compatible: - const: renesas,r9a09g057-rspi # RZ/V2H(P) + oneOf: + - enum: + - renesas,r9a09g057-rspi # RZ/V2H(P) + - renesas,r9a09g077-rspi # RZ/T2H + - items: + - const: renesas,r9a09g056-rspi # RZ/V2N + - const: renesas,r9a09g057-rspi + - items: + - const: renesas,r9a09g087-rspi # RZ/N2H + - const: renesas,r9a09g077-rspi # RZ/T2H reg: maxItems: 1 @@ -36,13 +42,12 @@ properties: - const: tx clocks: + minItems: 2 maxItems: 3 clock-names: - items: - - const: pclk - - const: pclk_sfr - - const: tclk + minItems: 2 + maxItems: 3 resets: maxItems: 2 @@ -62,12 +67,52 @@ required: - interrupt-names - clocks - clock-names - - resets - - reset-names - power-domains - '#address-cells' - '#size-cells' +allOf: + - $ref: spi-controller.yaml# + - if: + properties: + compatible: + contains: + enum: + - renesas,r9a09g057-rspi + then: + properties: + clocks: + minItems: 3 + + clock-names: + items: + - const: pclk + - const: pclk_sfr + - const: tclk + + required: + - resets + - reset-names + + - if: + properties: + compatible: + contains: + enum: + - renesas,r9a09g077-rspi + then: + properties: + clocks: + maxItems: 2 + + clock-names: + items: + - const: pclk + - const: pclkspi + + resets: false + reset-names: false + unevaluatedProperties: false examples: diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index 0543c526b783..5c87fc8a845d 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -153,7 +153,7 @@ properties: provides an interface to override the native DWC SSI CS control. patternProperties: - "^.*@[0-9a-f]+$": + "@[0-9a-f]+$": type: object additionalProperties: true diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml index 27414b78d61d..347bed0c4956 100644 --- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml +++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml @@ -21,6 +21,7 @@ properties: - enum: - xlnx,zynqmp-spi-r1p6 - xlnx,versal-net-spi-r1p6 + - cix,sky1-spi-r1p6 - const: cdns,spi-r1p6 reg: diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 82d051f7bd6e..3b8e990e30c4 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -111,7 +111,7 @@ properties: - compatible patternProperties: - "^.*@[0-9a-f]+$": + "@[0-9a-f]+$": type: object $ref: spi-peripheral-props.yaml additionalProperties: true diff --git a/Documentation/devicetree/bindings/thermal/amazon,al-thermal.txt b/Documentation/devicetree/bindings/thermal/amazon,al-thermal.txt deleted file mode 100644 index 12fc4ef04837..000000000000 --- a/Documentation/devicetree/bindings/thermal/amazon,al-thermal.txt +++ /dev/null @@ -1,33 +0,0 @@ -Amazon's Annapurna Labs Thermal Sensor - -Simple thermal device that allows temperature reading by a single MMIO -transaction. - -Required properties: -- compatible: "amazon,al-thermal". -- reg: The physical base address and length of the sensor's registers. -- #thermal-sensor-cells: Must be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description. - -Example: - thermal: thermal { - compatible = "amazon,al-thermal"; - reg = <0x0 0x05002860 0x0 0x1>; - #thermal-sensor-cells = <0x1>; - }; - - thermal-zones { - thermal-z0 { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&thermal 0>; - trips { - critical { - temperature = <105000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - }; - }; - diff --git a/Documentation/devicetree/bindings/thermal/amazon,al-thermal.yaml b/Documentation/devicetree/bindings/thermal/amazon,al-thermal.yaml new file mode 100644 index 000000000000..6b5884d74dd6 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/amazon,al-thermal.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/amazon,al-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amazon Annapurna Labs Thermal Sensor + +maintainers: + - Talel Shenhar <talel@amazon.com> + +description: + Simple thermal device that allows temperature reading by a single MMIO + transaction. + +properties: + compatible: + items: + - const: amazon,al-thermal + + reg: + maxItems: 1 + + '#thermal-sensor-cells': + const: 1 + +additionalProperties: false + +examples: + - | + thermal: thermal@5002860 { + compatible = "amazon,al-thermal"; + reg = <0x05002860 0x1>; + #thermal-sensor-cells = <0x1>; + }; + + thermal-zones { + z0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&thermal 0>; + trips { + critical { + temperature = <105000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/thermal/brcm,sr-thermal.txt b/Documentation/devicetree/bindings/thermal/brcm,sr-thermal.txt deleted file mode 100644 index 3ab330219d45..000000000000 --- a/Documentation/devicetree/bindings/thermal/brcm,sr-thermal.txt +++ /dev/null @@ -1,105 +0,0 @@ -* Broadcom Stingray Thermal - -This binding describes thermal sensors that is part of Stingray SoCs. - -Required properties: -- compatible : Must be "brcm,sr-thermal" -- reg : Memory where tmon data will be available. -- brcm,tmon-mask: A one cell bit mask of valid TMON sources. - Each bit represents single TMON source. -- #thermal-sensor-cells : Thermal sensor phandler -- polling-delay: Max number of milliseconds to wait between polls. -- thermal-sensors: A list of thermal sensor phandles and specifier. - specifier value is tmon ID and it should be - in correspond with brcm,tmon-mask. -- temperature: trip temperature threshold in millicelsius. - -Example: - tmons { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x8f100000 0x100>; - - tmon: tmon@0 { - compatible = "brcm,sr-thermal"; - reg = <0x0 0x40>; - brcm,tmon-mask = <0x3f>; - #thermal-sensor-cells = <1>; - }; - }; - - thermal-zones { - ihost0_thermal: ihost0-thermal { - polling-delay-passive = <0>; - polling-delay = <1000>; - thermal-sensors = <&tmon 0>; - trips { - cpu-crit { - temperature = <105000>; - hysteresis = <0>; - type = "critical"; - }; - }; - }; - ihost1_thermal: ihost1-thermal { - polling-delay-passive = <0>; - polling-delay = <1000>; - thermal-sensors = <&tmon 1>; - trips { - cpu-crit { - temperature = <105000>; - hysteresis = <0>; - type = "critical"; - }; - }; - }; - ihost2_thermal: ihost2-thermal { - polling-delay-passive = <0>; - polling-delay = <1000>; - thermal-sensors = <&tmon 2>; - trips { - cpu-crit { - temperature = <105000>; - hysteresis = <0>; - type = "critical"; - }; - }; - }; - ihost3_thermal: ihost3-thermal { - polling-delay-passive = <0>; - polling-delay = <1000>; - thermal-sensors = <&tmon 3>; - trips { - cpu-crit { - temperature = <105000>; - hysteresis = <0>; - type = "critical"; - }; - }; - }; - crmu_thermal: crmu-thermal { - polling-delay-passive = <0>; - polling-delay = <1000>; - thermal-sensors = <&tmon 4>; - trips { - cpu-crit { - temperature = <105000>; - hysteresis = <0>; - type = "critical"; - }; - }; - }; - nitro_thermal: nitro-thermal { - polling-delay-passive = <0>; - polling-delay = <1000>; - thermal-sensors = <&tmon 5>; - trips { - cpu-crit { - temperature = <105000>; - hysteresis = <0>; - type = "critical"; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/thermal/brcm,sr-thermal.yaml b/Documentation/devicetree/bindings/thermal/brcm,sr-thermal.yaml new file mode 100644 index 000000000000..576a627cd599 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/brcm,sr-thermal.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/brcm,sr-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom Stingray Thermal Sensors + +maintainers: + - Ray Jui <rjui@broadcom.com> + - Scott Branden <sbranden@broadcom.com> + +allOf: + - $ref: thermal-sensor.yaml# + +properties: + compatible: + const: brcm,sr-thermal + + reg: + maxItems: 1 + + brcm,tmon-mask: + description: + A one-cell bit mask of valid TMON sources. Each bit represents a single + TMON source. + $ref: /schemas/types.yaml#/definitions/uint32 + + '#thermal-sensor-cells': + const: 1 + +required: + - compatible + - reg + - brcm,tmon-mask + +additionalProperties: false + +examples: + - | + tmon: thermal-sensor@0 { + compatible = "brcm,sr-thermal"; + reg = <0x0 0x40>; + brcm,tmon-mask = <0x3f>; + #thermal-sensor-cells = <1>; + }; + + thermal-zones { + ihost0_thermal: ihost0-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + thermal-sensors = <&tmon 0>; + trips { + cpu-crit { + temperature = <105000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + ihost1_thermal: ihost1-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + thermal-sensors = <&tmon 1>; + trips { + cpu-crit { + temperature = <105000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + ihost2_thermal: ihost2-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + thermal-sensors = <&tmon 2>; + trips { + cpu-crit { + temperature = <105000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + ihost3_thermal: ihost3-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + thermal-sensors = <&tmon 3>; + trips { + cpu-crit { + temperature = <105000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + crmu_thermal: crmu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + thermal-sensors = <&tmon 4>; + trips { + cpu-crit { + temperature = <105000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + nitro_thermal: nitro-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + thermal-sensors = <&tmon 5>; + trips { + cpu-crit { + temperature = <105000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/thermal/db8500-thermal.txt b/Documentation/devicetree/bindings/thermal/db8500-thermal.txt deleted file mode 100644 index 2e1c06fad81f..000000000000 --- a/Documentation/devicetree/bindings/thermal/db8500-thermal.txt +++ /dev/null @@ -1,44 +0,0 @@ -* ST-Ericsson DB8500 Thermal - -** Thermal node properties: - -- compatible : "stericsson,db8500-thermal"; -- reg : address range of the thermal sensor registers; -- interrupts : interrupts generated from PRCMU; -- interrupt-names : "IRQ_HOTMON_LOW" and "IRQ_HOTMON_HIGH"; -- num-trips : number of total trip points, this is required, set it 0 if none, - if greater than 0, the following properties must be defined; -- tripN-temp : temperature of trip point N, should be in ascending order; -- tripN-type : type of trip point N, should be one of "active" "passive" "hot" - "critical"; -- tripN-cdev-num : number of the cooling devices which can be bound to trip - point N, this is required if trip point N is defined, set it 0 if none, - otherwise the following cooling device names must be defined; -- tripN-cdev-nameM : name of the No. M cooling device of trip point N; - -Usually the num-trips and tripN-*** are separated in board related dts files. - -Example: -thermal@801573c0 { - compatible = "stericsson,db8500-thermal"; - reg = <0x801573c0 0x40>; - interrupts = <21 0x4>, <22 0x4>; - interrupt-names = "IRQ_HOTMON_LOW", "IRQ_HOTMON_HIGH"; - - num-trips = <3>; - - trip0-temp = <75000>; - trip0-type = "active"; - trip0-cdev-num = <1>; - trip0-cdev-name0 = "thermal-cpufreq-0"; - - trip1-temp = <80000>; - trip1-type = "active"; - trip1-cdev-num = <2>; - trip1-cdev-name0 = "thermal-cpufreq-0"; - trip1-cdev-name1 = "thermal-fan"; - - trip2-temp = <85000>; - trip2-type = "critical"; - trip2-cdev-num = <0>; -} diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml b/Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml index 9ea2ea3a7599..adf208b7a5b9 100644 --- a/Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml @@ -100,7 +100,6 @@ properties: items: - const: timer - required: - compatible - reg diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml b/Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml index 76516e18e042..1d0bd36907ed 100644 --- a/Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml @@ -15,7 +15,6 @@ description: > reference generated by USEC, TSC or either clk_m or OSC. Each TMR can be programmed to generate one-shot, periodic, or watchdog interrupts. - properties: compatible: oneOf: diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 58ff948d93c9..057b32048f53 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -43,8 +43,14 @@ properties: - adi,ad5110 # Temperature sensor with integrated fan control - adi,adm1027 + # Analog Devices ADT7410 High Accuracy Digital Temperature Sensor + - adi,adt7410 # Analog Devices ADT7411 Temperature Sensor and 8-channel ADC - adi,adt7411 + # Analog Devices ADT7420 High Accuracy Digital Temperature Sensor + - adi,adt7420 + # Analog Devices ADT7422 High Accuracy Digital Temperature Sensor + - adi,adt7422 # Temperature sensor with integrated fan control - adi,adt7463 # Temperature sensor with integrated fan control @@ -53,6 +59,8 @@ properties: - adi,lt7182s # AMS iAQ-Core VOC Sensor - ams,iaq-core + # Arduino microcontroller interface over SPI on UnoQ board + - arduino,unoq-mcu # Temperature monitoring of Astera Labs PT5161L PCIe retimer - asteralabs,pt5161l # i2c h/w elliptic curve crypto module @@ -297,6 +305,10 @@ properties: - mps,mp2888 # Monolithic Power Systems Inc. multi-phase controller mp2891 - mps,mp2891 + # Monolithic Power Systems Inc. multi-phase controller mp2925 + - mps,mp2925 + # Monolithic Power Systems Inc. multi-phase controller mp2929 + - mps,mp2929 # Monolithic Power Systems Inc. multi-phase controller mp29502 - mps,mp29502 # Monolithic Power Systems Inc. multi-phase controller mp29608 @@ -317,6 +329,8 @@ properties: - mps,mp5998 # Monolithic Power Systems Inc. digital step-down converter mp9941 - mps,mp9941 + # Monolithic Power Systems Inc. digital step-down converter mp9945 + - mps,mp9945 # Temperature sensor with integrated fan control - national,lm63 # Temperature sensor with integrated fan control diff --git a/Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml b/Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml index 6d3ef364672e..6d3fa2bc9cee 100644 --- a/Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,pmic-typec.yaml @@ -28,7 +28,6 @@ properties: - qcom,pm4125-typec - const: qcom,pmi632-typec - connector: type: object $ref: /schemas/connector/usb-connector.yaml# diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index beab81e462d2..2bac488d2a9a 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -176,6 +176,8 @@ patternProperties: description: All Sensors Corporation "^asix,.*": description: ASIX Electronics Corporation + "^asl-tek,.*": + description: ASL Xiamen Technology Co., Ltd. "^aspeed,.*": description: ASPEED Technology Inc. "^asrock,.*": @@ -570,6 +572,8 @@ patternProperties: description: Foxconn Industrial Internet "^firefly,.*": description: Firefly + "^fitipower,.*": + description: Fitipower Integrated Technology Inc. "^flipkart,.*": description: Flipkart Inc. "^focaltech,.*": @@ -835,6 +839,8 @@ patternProperties: description: JOZ BV "^jty,.*": description: JTY + "^jutouch,.*": + description: JuTouch Technology Co., Ltd. "^kam,.*": description: Kamstrup A/S "^karo,.*": @@ -1323,6 +1329,8 @@ patternProperties: description: Raumfeld GmbH "^raydium,.*": description: Raydium Semiconductor Corp. + "^raystar,.*": + description: Raystar Optronics, Inc. "^rda,.*": description: Unisoc Communications, Inc. "^realtek,.*": diff --git a/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.yaml index dc6af204e8af..a519422c371c 100644 --- a/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm PM8916 watchdog timer controller maintainers: - - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + - Krzysztof Kozlowski <krzk@kernel.org> allOf: - $ref: watchdog.yaml# |