summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/display/intel_psr_regs.h
AgeCommit message (Expand)Author
2024-06-19intel_alpm: Fix wrong offset for PORT_ALPM_* registersJouni Högander
2024-05-23drm/i915: Define SEL_FETCH_PLANE registers via PICK_EVEN_2RANGES()Ville Syrjälä
2024-05-22drm/i915: Rename selective fetch plane registersVille Syrjälä
2024-05-22drm/i915: Simplify PIPESRC_ERLY_TPT definitionVille Syrjälä
2024-05-20drm/i915/psr: LunarLake PSR2_CTL[IO Wake Lines] is 6 bits wideJouni Högander
2024-05-06drm/i915: pass dev_priv explicitly to PORT_ALPM_LFPS_CTLJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to PORT_ALPM_CTLJani Nikula
2024-05-06FIXME drm/i915: pass dev_priv explicitly to ALPM_CTL2Jani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to ALPM_CTLJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to PIPE_SRCSZ_ERLY_TPTJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to PSR2_MAN_TRK_CTLJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to PSR2_SU_STATUSJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to EDP_PSR2_STATUSJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to PSR_EVENTJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to EDP_PSR2_CTLJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to EDP_PSR_DEBUGJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to EDP_PSR_PERF_CNTJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to EDP_PSR_STATUSJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to EDP_PSR_AUX_DATAJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to EDP_PSR_AUX_CTLJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to TRANS_PSR_IIRJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to TRANS_PSR_IMRJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to EDP_PSR_CTLJani Nikula
2024-05-06drm/i915: pass dev_priv explicitly to TRANS_EXITLINEJani Nikula
2024-04-25drm/i915: pass dev_priv to _MMIO_PIPE2, _MMIO_TRANS2, _MMIO_CURSOR2Jani Nikula
2024-04-02drm/i915/psr: Add missing ALPM AUX-Less register definitionsJouni Högander
2024-02-07drm/i915/alpm: Add ALPM register definitionsJouni Högander
2024-01-09drm/i915/psr: Enable psr2 early transport as possibleJouni Högander
2024-01-09drm/i915/psr: Configure PIPE_SRCSZ_ERLY_TPT for psr2 early transportJouni Högander
2023-11-07drm/i915/display: Support PSR entry VSC packet to be transmitted one frame ea...Mika Kahola
2023-06-16drm/i915/psr: Bring back HSW/BDW PSR AUX CH registers/setupVille Syrjälä
2023-06-16drm/i915/psr: Reintroduce HSW PSR1 registersVille Syrjälä
2023-06-16drm/i915/psr: Fix BDW PSR AUX CH data register offsetsVille Syrjälä
2023-04-20drm/i915/psr: Define more PSR mask bitsVille Syrjälä
2023-04-20drm/i915/psr: Clean up PSR register defininitionsVille Syrjälä
2023-04-04drm/i915/psr: split out PSR regs to a separate fileJani Nikula
generated by cgit (git 2.34.1) at 2025-04-12 11:35:08 +0000